KSZ8841-16MVLI TR Micrel, KSZ8841-16MVLI TR Datasheet - Page 53

• Manufacturer Part Number: KSZ8841-16MVLI TR
• Description: Ethernet ICs Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free)
• Manufacturer: Micrel

Specifications of KSZ8841-16MVLI TR

• Rohs: yes
• Product: Ethernet Controllers
• Package / Case: LQFP-128
• Mounting Style: SMD/SMT

Bank 0 QMU RX Flow Control High Watermark Configuration Register (0x04): QRFCR
This register contains the user defined QMU RX Queue high watermark configuration bit as below.
Bank 0 Bus Error Status Register (0x06): BESR
This register flags the different kinds of errors on the host bus.
Bank 0 Bus Burst Length Register (0x08): BBLR
Before the burst can be sent, the burst length needs to be programmed.
Bank 1: Reserved
Except Bank Select Register (0xE).
October 2007
Micrel, Inc.
Bit
15-13
12
11-0
Bit
15
14-11
10
9-0
Bit
15
14-12
11-0
0x0
0
0
-
0
0
Default Value
0x000
Default Value
0x000
Default Value
0x0
0x000
R/W
RO
RW
RO
R/W
RO
RO
RO
RO
R/W
RO
RW
RO
Description
Reserved
QMU RX Flow Control High Watermark Configuration
0: 3 KBytes
1: 2 KBytes
Reserved
Description
IBEC Illegal Byte Enable Combination
1: illegal byte enable combination occurs. The illegal combination value can be found
from bit 14 to bit 11.
0: legal byte enable combination.
Write 1 to clear.
IBECV Illegal Byte Enable Combination Value
Bit 14: byte enable 3.
Bit 13: byte enable 2.
Bit 12: byte enable 1.
Bit 11: byte enable 0.
This value is valid only when bit 15 is set to 1.
SSAXFER Simultaneous Synchronous and Asnychronous Transfers
1: Synchronous and Asnychronous Transfers occur simultaneously.
0: normal.
Write 1 to clear.
Reserved.
Description
Reserved.
BRL Burst Length (for burst read and write)
000: single.
011: fixed burst read length of 4.
101: fixed burst read length of 8.
111: fixed burst read length of 16.
Reserved.
53
KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6