KSZ8841-16MVLI TR Micrel, KSZ8841-16MVLI TR Datasheet - Page 55

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KSZ8841-16MVLI TR

Manufacturer Part Number
KSZ8841-16MVLI TR
Description
Ethernet ICs Single Ethernet Port + Generic (8, 16-bit) bus interface(Lead Free)
Manufacturer
Micrel
Datasheet

Specifications of KSZ8841-16MVLI TR

Rohs
yes
Product
Ethernet Controllers
Package / Case
LQFP-128
Mounting Style
SMD/SMT
Bank 3 On-Chip Bus Control Register (0x00): OBCR
This register controls the on-chip bus speed for the KSZ8841M. It is used for power management when the external host
CPU is running at a slow frequency. The default of the on-chip bus speed is 125 MHz without EEPROM. When the
external host CPU is running at a higher clock rate, the on-chip bus should be adjusted for the best performance.
Bank 3 EEPROM Control Register (0x02): EEPCR
To support an external EEPROM, tie the EEPROM Enable (EEEN) pin to High; otherwise, tie it to Low. If an external
EEPROM is not used, the default chip Base Address (0x300), and the software programs the host MAC address. If an
EEPROM is used in the design (EEPROM Enable pin to High), the chip Base Address and host MAC address are loaded
from the EEPROM immediately after reset. The KSZ8841M allows the software to access (read and write) the EEPROM
directly; that is, the EEPROM access timing can be fully controlled by the software if the EEPROM Software Access bit is
set.
October 2007
Micrel, Inc.
Bit
15-2
1-0
Bit
15-5
4
3
2-0
-
-
0
-
Default Value
0x0
Default Value
0x0
R/W
RO
RW
R/W
RO
RW
RO
RW
Description
Reserved.
OBSC On-Chip Bus Speed Control
00: 125MHz.
01: 62.5MHz.
10: 41.66MHz.
11: 25MHz.
Note: When external EEPROM is enabled, the bit 1 in Configparm word (0x6H) is used to
contol this speed as below:
Bit 1 = 0 , this value will be 00 for 125 MHz.
Bit 1 = 1 , this value will be 11 for 25 MHz.
(User still can write these two bits to change speed after EEPROM data loaded)
Description
Reserved.
EESA EEPROM Software Access
1: enable software to access EEPROM through bit 3 to bit 0.
0: disable software to access EEPROM.
EECB EEPROM Status Bit
Data Receive from EEPROM. This bit directly reads the EEDI pin.
EECB EEPROM Control Bits
Bit 2: Data Transmit to EEPROM. This bit directly controls the device’s EEDO pin.
Bit 1: Serial Clock. This bit directly controls the device’s EESK pin.
Bit 0: Chip Select for EEPROM. This bit directly controls the device’s EECS pin.
55
KSZ8841-16/32 MQL/MVL/MBL
M9999-102207-1.6

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