S9S08SG8E2VTG Freescale Semiconductor, S9S08SG8E2VTG Datasheet - Page 251

• Manufacturer Part Number: S9S08SG8E2VTG
• Description: 8-bit Microcontrollers - MCU 9S08 UC W/ 8K 0.25UM SGF
• Manufacturer: Freescale Semiconductor

Specifications of S9S08SG8E2VTG

• Rohs: yes
• Core: S08
• Processor Series: MC9S08SG8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: TSSOP-16
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

16.3
This section consists of register descriptions in address order.
16.3.1
TPMxSC contains the overflow status flag and control bits used to configure the interrupt enable, TPM
configuration, clock source, and prescale factor. These controls relate to all channels within this timer
module.
Freescale Semiconductor
CLKS[B:A]
Reset
CPWMS
PS[2:0]
Field
TOIE
TOF
4–3
2–0
W
7
6
5
R
Register Definition
TOF
Timer overflow flag. This read/write flag is set when the TPM counter resets to 0x0000 after reaching the modulo
value programmed in the TPM counter modulo registers. Clear TOF by reading the TPM status and control
register when TOF is set and then writing a logic 0 to TOF. If another TPM overflow occurs before the clearing
sequence is complete, the sequence is reset so TOF would remain set after the clear sequence was completed
for the earlier TOF. This is done so a TOF interrupt request cannot be lost during the clearing sequence for a
previous TOF. Reset clears TOF. Writing a logic 1 to TOF has no effect.
0 TPM counter has not reached modulo value or overflow
1 TPM counter has overflowed
Timer overflow interrupt enable. This read/write bit enables TPM overflow interrupts. If TOIE is set, an interrupt is
generated when TOF equals one. Reset clears TOIE.
0 TOF interrupts inhibited (use for software polling)
1 TOF interrupts enabled
Center-aligned PWM select. When present, this read/write bit selects CPWM operating mode. By default, the TPM
operates in up-counting mode for input capture, output compare, and edge-aligned PWM functions. Setting
CPWMS reconfigures the TPM to operate in up/down counting mode for CPWM functions. Reset clears CPWMS.
0 All channels operate as input capture, output compare, or edge-aligned PWM mode as selected by the
1 All channels operate in center-aligned PWM mode.
Clock source selects. As shown in
three clock sources to drive the counter prescaler. The fixed system clock source is only meaningful in systems
with a PLL-based system clock. When there is no PLL, the fixed-system clock source is the same as the bus rate
clock. The external source is synchronized to the bus clock by TPM module, and the fixed system clock source
(when a PLL is present) is synchronized to the bus clock by an on-chip synchronization circuit. When a PLL is
present but not enabled, the fixed-system clock source is the same as the bus-rate clock.
Prescale factor select. This 3-bit field selects one of 8 division factors for the TPM clock input as shown in
Table
the clock source selected to drive the TPM system. The new prescale factor will affect the clock source on the
next system clock cycle after the new value is updated into the register bits.
TPM Status and Control Register (TPMxSC)
0
0
7
MSnB:MSnA control bits in each channel’s status and control register.
16-7. This prescaler is located after any clock source synchronization or clock source selection so it affects
TOIE
0
6
Figure 16-7. TPM Status and Control Register (TPMxSC)
MC9S08SG8 MCU Series Data Sheet, Rev. 7
Table 16-5. TPMxSC Field Descriptions
CPWMS
5
0
Table
16-6, this 2-bit field is used to disable the TPM system or select one of
CLKSB
0
4
Description
CLKSA
0
3
PS2
0
2
Timer/PWM Module (S08TPMV3)
PS1
1
0
PS0
0
0
247