S9S08SG8E2VTG Freescale Semiconductor, S9S08SG8E2VTG Datasheet - Page 278

• Manufacturer Part Number: S9S08SG8E2VTG
• Description: 8-bit Microcontrollers - MCU 9S08 UC W/ 8K 0.25UM SGF
• Manufacturer: Freescale Semiconductor

Specifications of S9S08SG8E2VTG

• Rohs: yes
• Core: S08
• Processor Series: MC9S08SG8
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 40 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2.7 V to 5.5 V
• Operating Temperature Range: - 40 C to + 105 C
• Package / Case: TSSOP-16
• Mounting Style: SMD/SMT
• A/d Bit Size: 10 bit
• A/d Channels Available: 12
• Interface Type: SCI, SPI
• Maximum Operating Temperature: + 105 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Program Memory Type: Flash
• Supply Voltage - Max: 5.5 V
• Supply Voltage - Min: 2.7 V

A-Only — Trigger when the address matches the value in comparator A
A OR B — Trigger when the address matches either the value in comparator A or the value in
comparator B
A Then B — Trigger when the address matches the value in comparator B but only after the address for
another cycle matched the value in comparator A. There can be any number of cycles after the A match
and before the B match.
A AND B Data (Full Mode) — This is called a full mode because address, data, and R/W (optionally)
must match within the same bus cycle to cause a trigger event. Comparator A checks address, the low byte
of comparator B checks data, and R/W is checked against RWA if RWAEN = 1. The high-order half of
comparator B is not used.
In full trigger modes it is not useful to specify a tag-type CPU breakpoint (BRKEN = TAG = 1), but if you
do, the comparator B data match is ignored for the purpose of issuing the tag request to the CPU and the
CPU breakpoint is issued when the comparator A address matches.
A AND NOT B Data (Full Mode) — Address must match comparator A, data must not match the low
half of comparator B, and R/W must match RWA if RWAEN = 1. All three conditions must be met within
the same bus cycle to cause a trigger.
In full trigger modes it is not useful to specify a tag-type CPU breakpoint (BRKEN = TAG = 1), but if you
do, the comparator B data match is ignored for the purpose of issuing the tag request to the CPU and the
CPU breakpoint is issued when the comparator A address matches.
Event-Only B (Store Data) — Trigger events occur each time the address matches the value in
comparator B. Trigger events cause the data to be captured into the FIFO. The debug run ends when the
FIFO becomes full.
A Then Event-Only B (Store Data) — After the address has matched the value in comparator A, a trigger
event occurs each time the address matches the value in comparator B. Trigger events cause the data to be
captured into the FIFO. The debug run ends when the FIFO becomes full.
Inside Range (A  Address  B) — A trigger occurs when the address is greater than or equal to the value
in comparator A and less than or equal to the value in comparator B at the same time.
Outside Range (Address < A or Address > B) — A trigger occurs when the address is either less than
the value in comparator A or greater than the value in comparator B.
MC9S08SG8 MCU Series Data Sheet, Rev. 7
274
Freescale Semiconductor