XRT83L34ES Exar, XRT83L34ES Datasheet - Page 20

• Manufacturer Part Number: XRT83L34ES
• Description: Peripheral Drivers & Components - PCIs
• Manufacturer: Exar

Specifications of XRT83L34ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83L34
REV. 1.0.1
S
IGNAL
LOOP1_0
LOOP0_0
LOOP1_1
LOOP0_1
LOOP1_2
LOOP0_2
LOOP1_3
LOOP0_3
RCLKE
TCLKE
µPTS1
µPTS2
D[2]/
D[1]/
D[0]/
D[7]
D[6]
D[5]
D[4]
D[3]
N
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
AME
P
106
107
106
107
42
43
44
45
46
47
48
49
42
43
44
45
46
47
48
49
IN
#
T
I/O
YPE
I
Microprocessor Type Select Input Pins/Receive Clock Edge Select/
Transmit Clock Edge Select Input Pin:
The exact function of these input pins depends upon whether the XRT83L34
device has been configured to operate in the HOST or Hardware Mode, as
described below.
HOST Mode Operation - Microprocessor Type Select Input Bits 2 and 1 -
µPTS[2:1]:
These two input pins permit the user to configure the Microprocessor Inter-
face to operate in either of the following modes.
•
•
The relationship between the settings of these input pins and the corre-
sponding Microprocessor Interface configuration is presented below.
N
Hardware Mode Operation - Receive Clock Edge Select Input pin:
See “Receive Clock Edge Select/Microprocessor Type Select Input
pin:” on page 8.
Hardware Mode Operation - Transmit Clock Edge Select Input pin:
See “Transmit Clock Edge - Hardware Mode” on page 9.
N
Bi-Directional Data Bus Pins/Loop-back Control Input Pins - D[7:0]:
The exact function of these input/output pins depends upon whether the
XRT83L34 device has been configured to operate in the HOST or Hardware
Mode, as described below.
HOST Mode Operation - Bi-Directional Data Bus Input/Output Pins
(Microprocessor Interface block) - D[7:0]:
These pins are used to drive and receive data over the bi-directional data
bus, whenever the Microprocessor performs a READ or WRITE operation
with the Microprocessor Interface of the XRT83L34 device.
Hardware Mode Operation - Loop-back Control pin, Bits
[1:0]_Channel_n - Hardware Mode
Pins 42 - 49 control which Loop-Back mode is selected per channel.
“Loop-Back Control Pins - Hardware Mode:” on page 22.
N
OTE
OTE
OTE
Intel-Asynchronous Mode
Motorola-Asynchronous Mode
: The
: These pins are internally pulled “Low” with a 50kΩ resistor.
: Internally pulled “Low” with a 50kΩ resistor.
input pin permits the user to selects either the Intel-Asynchronous or
the Motorola Asynchronous Modes.
µPTS2
0
0
µ
PTS2 (pin107) should be tied to GND. The
17
µPTS1
0
1
D
ESCRIPTION
Intel Asynchronous Mode
Motorola Asynchronous Mode
µP Type
xr
µ
PTS1(pin 106)
See