XRT83L34ES Exar, XRT83L34ES Datasheet - Page 67
XRT83L34ES
Manufacturer Part Number
XRT83L34ES
Description
Peripheral Drivers & Components - PCIs
Manufacturer
Exar
Datasheet
1.XRT83L34ES.pdf
(99 pages)
Specifications of XRT83L34ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
R
EGISTER
0000001
0010001
0100001
0110001
B
D7
D6
D5
D4
IT
A
#
DDRESS
TERSEL1_n Termination Impedance Select1:
TERSEL0_n Termination Impedance Select bit 0:
C
C
C
C
C
RXTSEL_n
TXTSEL_n
HANNEL
HANNEL
HANNEL
HANNEL
HANNEL
N
AME
T
ABLE
_n
_0
_1
_2
_3
21: M
Receiver Termination Select: In Host mode, this bit is used
to select between the internal and external line termination
modes for the receiver according to the following table;
Transmit Termination Select: In Host mode, this bit is used
to select between the internal and external line termination
modes for the transmitter according to the following table;
In Host mode and in internal termination mode, (TXTSEL = “1”
and RXTSEL = “1”) TERSEL[1:0] control the transmit and
receive termination impedance according to the following
table;
In the internal termination mode, the receiver termination of
each receiver is realized completely by internal resistors or by
the combination of internal and one fixed external resistor.
In the internal termination mode, the transmitter output should
be AC coupled to the transformer.
See description of bit D5 for the function of this bit.
ICROPROCESSOR
TERSEL1 TERSEL0
0
0
1
1
RXTSEL
TXTSEL
0
1
0
1
64
R
EGISTER
0
1
0
1
F
UNCTION
RX Termination
TX Termination
External
External
Internal
Internal
#1, B
Termination
IT
100Ω
110Ω
120Ω
75Ω
D
ESCRIPTION
R
EGISTER
T
R/W
R/W
R/W
R/W
YPE
XRT83L34
REV. 1.0.1
R
V
ALUE
ESET
0
0
0
0
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