XRT83L34ES Exar, XRT83L34ES Datasheet - Page 68

• Manufacturer Part Number: XRT83L34ES
• Description: Peripheral Drivers & Components - PCIs
• Manufacturer: Exar

Specifications of XRT83L34ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83L34
REV. 1.0.1
D3
D2
D1
D0
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
JASEL1_n
JASEL0_n
FIFOS_n
JABW_n
T
ABLE
21: M
Jitter Attenuator select bit 1: The JASEL1 and JASEL0 bits
are used to disable or place the jitter attenuator of each chan-
nel independently in the transmit or receive path.
Jitter Attenuator select bit 0: See description of bit D3 for the
function of this bit.
Jitter Attenuator Bandwidth Select: In E1 mode, set this bit
to “1” to select a 1.5Hz Bandwidth for the Jitter Attenuator. The
FIFO length will be automatically set to 64 bits. Set this bit to
“0” to select 10Hz Bandwidth for the Jitter Attenuator in E1
mode. In T1 mode the Jitter Attenuator Bandwidth is perma-
nently set to 3Hz, and the state of this bit has no effect on the
Bandwidth.
FIFO Size Select: See table of bit D1 above for the function of
this bit.
Mode
E1
E1
E1
E1
T1
T1
T1
T1
ICROPROCESSOR
JASEL1
bit D3
0
0
1
1
JABW
bit D1
0
0
1
1
0
0
1
1
JASEL0
65
bit D2
R
EGISTER
0
1
0
1
FIFOS_n
bit D0
0
1
0
1
0
1
0
1
JA Disabled
JA in Transmit Path
JA in Receive Path
JA in Receive Path
#1, B
JA B-W
JA Path
IT
1.5
1.5
Hz
10
10
3
3
3
3
D
ESCRIPTION
FIFO
Size
32
64
32
64
32
64
64
64
xr
R/W
R/W
R/W
R/W
0
0
0
0