XRT83SL30ES Exar, XRT83SL30ES Datasheet - Page 42

• Manufacturer Part Number: XRT83SL30ES
• Description: Peripheral Drivers & Components - PCIs 1 CHT1/E1 LIUSH
• Manufacturer: Exar

Specifications of XRT83SL30ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
DIGITAL LOOP-BACK (DLOOP)
Digital Loop-Back or Local Loop-Back allows the transmit clock and data to be looped back to the
corresponding receiver output pins through the encoder/decoder and jitter attenuator. In this mode, receive
data and clock are ignored, but the transmit data will be sent to the line uninterrupted. This loop back feature
allows users to configure the line interface as a pure jitter attenuator. The Digital Loop-Back signal flow is
shown in
DUAL LOOP-BACK
Figure 22
path will have the same result as placing the jitter attenuator in the receive path. In dual Loop-Back mode the
recovered clock and data from the line are looped back through the transmitter to the TTIP and TRING without
passing through the jitter attenuator. The transmit clock and data are looped back through the jitter attenuator
to the RCLK and RPOS/RDATA and RNEG pins.
Figure
depicts the data flow in dual-loopback. In this mode, selecting the jitter attenuator in the transmit
F
IGURE
21.
F
IGURE
RPOS
RNEG
TPOS
TNEG
RCLK
TCLK
RPOS
RNEG
TNEG
TPOS
RCLK
TCLK
21. D
22. S
IGITAL
IGNAL FLOW IN
Encoder
Decoder
Encoder
Decoder
L
OOP
-
BACK MODE WITH JITTER ATTENUATOR SELECTED IN
JA
D
JA
UAL LOOP
39
-
BACK MODE
Timing
Control
Timing
Control
Recovery
Recovery
Data &
Data &
Clock
Clock
Tx
Tx
Rx
Rx
TTIP
TRING
RTIP
RRING
TTIP
TRING
RTIP
RRING
T
RANSMIT PATH
REV. 1.0.1