XRT83SL30ES Exar, XRT83SL30ES Datasheet - Page 52

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XRT83SL30ES

Manufacturer Part Number
XRT83SL30ES
Description
Peripheral Drivers & Components - PCIs 1 CHT1/E1 LIUSH
Manufacturer
Exar
Datasheet

Specifications of XRT83SL30ES

Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
XRT83SL30
SINGLE-CHANNEL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
R
EGISTER
00011
B
D7
D6
D5
IT
A
#
DDRESS
NLCDE1
NLCDE0
CODES
N
AME
T
ABLE
21: M
Network Loop Code Detection Enable bit 1:
This bit together with NLCDE0, Control the Loop-Code detection
according to the following table:
When NLCDE1=”0” and NCLDE0=”1”, or NLCDE1=”1” and
NLCDE0=”0”, the chip is manually programed to monitor the
receive data for the Loop-Up or Loop-Down code respectively.
When the presence of the “00001” or “001” pattern is detected for
more than 5 seconds, the status of the NLCD bit is set to “1” and
if the NLCD interrupt is enabled an interrupt is initiated. The Host
has the option to control the Loop-Back function manually.
Setting the NLCDE1=”1” and NLCDE0=”1” enables the Auto-
matic Loop-Code detection and Remote-Loop-Back activation
mode. As this mode is initiated, the state of the NLCD interface
bit is reset to “0” and the chip is programmed to monitor the
receive data for the Loop-Up Code. If the “00001” pattern is
detected for longer than 5 seconds, the NLCD bit is set to “1”,
Remote Loop-Back is activated and the chip is automatically pro-
gramed to monitor the receive data for the Loop-Down code. The
NLCD bit stays set even after the chip stops receiving the Loop-
Up code. The remote Loop-Back condition is removed when the
chip receives the Loop-Down code for more than 5 seconds or if
the Automatic Loop-Code detection mode is terminated.
Network Loop Code Detection Enable bit 0: See description
of bit D7 for the function of this bit.
ENCODING and DECODING SELECT:
Writing a “0” to this bit selects HDB3 or B8ZS encoding and
decoding. Writing a “1” selects an AMI coding scheme.This bit is
only active when single-rail mode is selected.
NLCDE1
ICROPROCESSOR
0
0
1
1
NLCDE0
0
1
0
1
49
R
EGISTER
F
UNCTION
Detect Loop-Down Code in
Detect Loop-Up Code in
Automatic Loop-Code
Disable Loop-Code
#3
Receive Data
Receive Data
BIT DESCRIPTION
Function
Detection
Detection
R
EGISTER
T
R/W
R/W
R/W
R/W
YPE
REV. 1.0.1
R
V
ALUE
ESET
0
0
0
0

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