MCIMX6S1AVM08ABR Freescale Semiconductor, MCIMX6S1AVM08ABR Datasheet - Page 124

• Manufacturer Part Number: MCIMX6S1AVM08ABR
• Description: Processors - Application Specialized i.MX6 Solo rev 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6S1AVM08ABR

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-624
• Interface Type: Parallel
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Electrical Characteristics
Ground = 0.0 V; load capacitance = 40 pF; MediaLB speed = 1024 Fs; Fs = 48 kHz; all timing
parameters specified from the valid voltage threshold as listed in
124
1
2
3
MLBCLK operating frequency
MLBCLK rise time
MLBCLK fall time
MLBCLK low time
MLBCLK high time
MLBSIG/MLBDAT receiver
input valid to MLBCLK falling
MLBSIG/MLBDAT receiver
input hold from MLBCLK low
MLBSIG/MLBDAT output high
impedance from MLBCLK low
Bus Hold from MLBCLK low
MLBSIG/MLBDAT output valid
from transition of MLBCLK (low
to high)
MLBCLK Operating
Frequency
MLBCLK rise time
MLBCLK fall time
MLBCLK low time
MLBCLK high time
MLBSIG/MLBDAT receiver
input valid to MLBCLK falling
MLBSIG/MLBDAT receiver
input hold from MLBCLK low
The controller can shut off MLBCLK to place MediaLB in a low-power state. Depending on the time the clock is
shut off, a runt pulse can occur on MLBCLK.
MLBCLK low/high time includes the pulse width variation.
The MediaLB driver can release the MLBDAT/MLBSIG line as soon as MLBCLK is low; however, the logic state
of the final driven bit on the line must remain on the bus for t
meeting the maximum load capacitance listed.
Parameter
Parameter
1
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
2
1
Table 80. MLB 256/512 Fs Timing Parameters
Table 81. MLB 1024 Fs Timing Parameters
Symbol
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
dsmcf
dhmcf
f
t
t
t
dhmcf
mckh
dsmcf
mcfdz
f
mckh
mdzh
delay
mckr
mckf
mckl
mckr
mckf
mckl
mck
mck
11.264
45.056
t
t
Min
mdzh
Min
mdzh
6.1
9.3
30
14
30
14
—
—
—
—
1
0
4
1
Max
25.6
t
mdzh
mckl
Max
51.2
10
—
—
—
—
—
3
3
—
—
—
—
1
1
. Therefore, coupling must be minimized while
Table
Unit
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
81; unless otherwise noted.
1024xfs at 44.0 kHz
1024xfs at 50.0 kHz
256xFs at 44.0 kHz
512xFs at 50.0 kHz
V
V
Comment
V
V
Comment
Freescale Semiconductor
IL
IH
IL
IH
256xFs
512xFs
256xFs
512xFs
TO V
TO V
TO V
TO V
—
—
—
—
—
—
—
2
3
IH
IH
IL
IL