MCIMX6S1AVM08ABR Freescale Semiconductor, MCIMX6S1AVM08ABR Datasheet - Page 49

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MCIMX6S1AVM08ABR

Manufacturer Part Number
MCIMX6S1AVM08ABR
Description
Processors - Application Specialized i.MX6 Solo rev 1.1
Manufacturer
Freescale Semiconductor
Type
Multimedia Applicationsr
Datasheet

Specifications of MCIMX6S1AVM08ABR

Rohs
yes
Core
ARM Cortex A9
Processor Series
i.MX6
Data Bus Width
32 bit
Maximum Clock Frequency
800 MHz
Data Ram Size
16 KB
Operating Supply Voltage
1.175 V to 1.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-624
Interface Type
Parallel
Memory Type
L1/L2 Cache, ROM, SRAM
Minimum Operating Temperature
- 40 C
Number Of Timers
2
2. Calibration is done against 240 Ω external reference resistor.
3. Output driver impedance deviation (calibration accuracy) is ±5% (max/min impedance) across PVTs.
4.8.3
The LVDS interface complies with TIA/EIA 644-A standard. See, TIA/EIA STANDARD 644-A,
“Electrical Characteristics of Low Voltage Differential Signaling (LVDS) Interface Circuits” for details.
4.8.4
Table 38
4.9
This section contains the timing and electrical parameters for the modules in each i.MX 6Solo/6DualLite
processor.
4.9.1
Figure 10
Freescale Semiconductor
Differential Output Impedance
CC1
ID
shows MLB I/O differential output impedance of the i.MX 6Solo/6DualLite processors.
System Modules Timing
Parameter
shows the reset timing and
Duration of POR_B to be qualified as valid (input slope = 5 ns)
LVDS I/O Output Buffer Impedance
MLB I/O Differential Output Impedance
Reset Timings Parameters
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
(Input)
POR_B
Table 38. MLB I/O Differential Output Impedance
Symbol
Zo
Table 39. Reset Timing Parameters
Figure 10. Reset Timing Diagram
Parameter
Table 39
Test Conditions
lists the timing parameters.
CC1
1.6 K
Min
Min
1
Typ
Electrical Characteristics
Max
Max
RTC_XTALI
Unit
cycle
Unit
Ω
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