MCIMX6S1AVM08ABR Freescale Semiconductor, MCIMX6S1AVM08ABR Datasheet - Page 32

• Manufacturer Part Number: MCIMX6S1AVM08ABR
• Description: Processors - Application Specialized i.MX6 Solo rev 1.1
• Manufacturer: Freescale Semiconductor
• Type: Multimedia Applicationsr

Specifications of MCIMX6S1AVM08ABR

• Rohs: yes
• Core: ARM Cortex A9
• Processor Series: i.MX6
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 800 MHz
• Data Ram Size: 16 KB
• Operating Supply Voltage: 1.175 V to 1.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-624
• Interface Type: Parallel
• Memory Type: L1/L2 Cache, ROM, SRAM
• Minimum Operating Temperature: - 40 C
• Number Of Timers: 2

Electrical Characteristics
4.2.2
No special restrictions for i.MX 6Solo/6DualLite IC.
4.2.3
All I/O pins should not be externally driven while the I/O power supply for the pin (NVCC_xxx) is OFF.
This can cause internal latch-up and malfunctions due to reverse current flows. For information about I/O
power supply of each pin, see “Power Rail” columns in pin list tables of
and Contact Assignments.”
4.3
Various internal supplies can be powered ON from internal LDO voltage regulators. All the supply pins
named *_CAP must be connected to external capacitors. The onboard LDOs are intended for internal use
only and should not be used to power any external circuitry. See the i.MX 6Solo/6DualLite Reference
Manual (IMX6SDLRM) for details on the power tree scheme.
4.3.1
There are three digital LDO regulators (“Digital”, because of the logic loads that they drive, not because
of their construction). The advantages of the regulators are to reduce the input supply variation because of
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— VDDARM_IN supply must be turned ON together with VDDSOC_IN supply or not delayed
— VDDARM_CAP must not exceed VDDSOC_CAP by more than 50 mV.
Integrated LDO Voltage Regulator Parameters
more than 1 ms
Power-Down Sequence
Power Supplies Usage
Digital Regulators (LDO_ARM, LDO_PU, LDO_SOC)
The POR_B input (if used) must be immediately asserted at power-up and
remain asserted until after the last power rail reaches its working voltage. In
the absence of an external reset feeding the POR_B input, the internal POR
module takes control. See the i.MX 6Solo/6DualLite Reference Manual for
further details and to ensure that all necessary requirements are being met.
Need to ensure that there is no back voltage (leakage) from any supply on
the board towards the 3.3 V supply (for example, from the external
components that use both the 1.8 V and 3.3 V supplies).
USB_OTG_VBUS and USB_H1_VBUS are not part of the power supply
sequence and may be powered at any time.
The *_CAP signals should not be powered externally. These signals are
intended for internal LDO or LDO bypass operation only.
i.MX 6Solo/6DualLite Automotive and Infotainment Applications Processors, Rev. 1
NOTE
NOTE
NOTE
NOTE
Section 6, “Package Information
Freescale Semiconductor