IS66WVE1M16BLL-55BLI-TR ISSI, IS66WVE1M16BLL-55BLI-TR Datasheet - Page 8

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IS66WVE1M16BLL-55BLI-TR

Manufacturer Part Number
IS66WVE1M16BLL-55BLI-TR
Description
SRAM 16Mb 1M x 16 55ns Pseudo SRAM
Manufacturer
ISSI
Datasheet

Specifications of IS66WVE1M16BLL-55BLI-TR

Rohs
yes
Memory Size
16 Mbit
Organization
1 Mbit x 16
Access Time
55 ns
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
Maximum Operating Current
35 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Package / Case
BGA-48
Memory Type
Psuedo
Factory Pack Quantity
2500
Bus Operating Modes
Asynchronous Mode Operation
Rev. A | Feb. 2012
Figure 2. Asynchronous Read Operation
UB#/LB#
Address
DQ15
DQ0-
WE#
OE#
CE#
PSRAM products incorporates the industry-standard, asynchronous interface. This bus interface
supports asynchronous Read and WRITE operations as well as page mode READ operation for
enhanced bandwidth. The supported interface is defined by the value loaded into the CR.
PSRAM products power up in the asynchronous operating mode. This mode uses the industry-
standard SRAM control interface (CE#, OE#, WE#, and LB#/UB#).
READ operations are initiated by bringing CE#, OE#, and LB#/UB# LOW while keeping WE# HIGH
(see Figure 2). Valid data will be driven out of the I/Os after the specified access time has elapsed.
WRITE operations occur when CE#,WE#, and LB#/UB# are driven LOW (see Figure 3). During
WRITE operations, the level of OE# is a “Don’t Care”; WE# overrides OE#. The data to be written is
latched on the rising edge of CE#, WE#, or LB#/UB#, whichever occurs first. WE# LOW time must be
limited to tCEM.
www.issi.com
t
RC
= READ cycle Time
ADDRESS
VALID
- SRAM@issi.com
VALID
DATA
IS66WVE1M16BLL
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