Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 145
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Z8F011ASH020EG2156
Manufacturer Part Number
Z8F011ASH020EG2156
Description
8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
Manufacturer
ZiLOG
Datasheet
1.Z8F011AHJ020EG2156.pdf
(257 pages)
Specifications of Z8F011ASH020EG2156
Rohs
yes
Core
eZ8
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
1 KB
Data Ram Size
256 B
On-chip Adc
No
Package / Case
SOIC-20
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
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PS025113-1212
Bit
Field
RESET
R/W
Address
Bit
[7]
WDT_RES
[6]
WDT_AO
[5:4]
OSC_SEL
Bit
Field
RESET
R/W
Address
Note: U = Unchanged by Reset. R/W = Read/Write.
Flash Option Bit Address Space
WDT_RES WDT_AO
Description
Watchdog Timer Reset
0 = Watchdog Timer time-out generates an interrupt request. Interrupts must be globally
1 = Watchdog Timer time-out causes a system reset. This is the default setting for unpro-
Watchdog Timer Always On
0 = On application of system power, Watchdog Timer is automatically enabled. Watchdog
1 = Watchdog Timer is enabled on execution of the WDT instruction. Once enabled, the
OSCILLATOR Mode Selection
00 = On-chip oscillator configured for use with external RC networks (<4 MHz).
01 = Minimum power for use with very low frequency crystals (32 kHz to 1.0 MHz).
10 = Medium power for use with medium frequency crystals or ceramic resonators (0.5 MHz
11 = Maximum power for use with high frequency crystals (5.0 MHz to 20.0 MHz). This is the
R/W
R/W
7
0
The first two bytes of Flash program memory at addresses
for the user-programmable Flash option bits. See Tables 81 and 82.
U
7
enabled for the eZ8 CPU to acknowledge the interrupt request.
grammed (erased) Flash.
Timer cannot be disabled.
Watchdog Timer can only be disabled by a reset. This is the default setting for unpro-
grammed (erased) Flash.
Table 81. Flash Option Bits at Program Memory Address 0000H
to 5.0 MHz).
default setting for unprogrammed (erased) Flash.
R/W
6
0
R/W
U
6
Table 80. Trim Bit Data Register (TRMDR)
R/W
R/W
5
0
OSC_SEL[1:0]
U
5
Program Memory 0000H
TRMDR: Trim Bit Data
R/W
R/W
4
0
U
4
FF7H
VBO_AO
R/W
R/W
3
0
U
3
Flash Option Bit Address Space
R/W
0000H
FRP
R/W
Z8 Encore!
2
0
U
2
Product Specification
and
Reserved
R/W
0001H
R/W
1
0
U
1
®
F0830 Series
are reserved
FWP
R/W
R/W
U
0
0
0
127
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