Z8F011ASH020EG2156 ZiLOG, Z8F011ASH020EG2156 Datasheet - Page 80

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Z8F011ASH020EG2156

Manufacturer Part Number
Z8F011ASH020EG2156
Description
8-bit Microcontrollers - MCU 1K FLASH 256B RAM 16B NVDS
Manufacturer
ZiLOG
Datasheet

Specifications of Z8F011ASH020EG2156

Rohs
yes
Core
eZ8
Data Bus Width
8 bit
Maximum Clock Frequency
20 MHz
Program Memory Size
1 KB
Data Ram Size
256 B
On-chip Adc
No
Package / Case
SOIC-20
Mounting Style
SMD/SMT
Interface Type
UART
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Number Of Programmable I/os
17
Number Of Timers
2
Program Memory Type
Flash
Supply Voltage - Max
3.6 V
Supply Voltage - Min
2.7 V
PS025113-1212
Bit
Field
RESET
R/W
Address
Bit
[7]
PA7ENH
[6]
PA6CENH
[5:0]
PAxENH
Note: x indicates register bits in the address range 5–0.
IRQ1 Enable High and Low Bit Registers
PA7ENH PA6CENH PA5ENH
Description
Port A Bit[7] Interrupt Request Enable High Bit
Port A Bit[7] or Comparator Interrupt Request Enable High Bit
Port A Bit[x] Interrupt Request Enable High Bit
See the interrupt port select register for selection of either Port A or Port D as the interrupt
source.
R/W
7
0
Table 41 describes the priority control for IRQ1. The IRQ1 Enable High and Low Bit reg-
isters, shown in Tables 42 and 43, form a priority-encoded enabling service for interrupts
in the Interrupt Request 1 Register. Priority is generated by setting the bits in each register.
Note: x indicates register bits in the address range 7–0.
IRQ1ENH[x]
Table 42. IRQ1 Enable High Bit Register (IRQ1ENH)
R/W
0
0
1
1
6
0
Table 41. IRQ1 Enable and Priority Encoding
R/W
IRQ1ENL[x]
5
0
0
1
0
1
PA4ENH
R/W
4
0
FC4H
Disabled
Priority
Level 1
Level 2
Level 3
PA3ENH
R/W
3
0
Interrupt Control Register Definitions
Description
PA2ENH
Disabled
Nominal
R/W
High
Low
Z8 Encore!
2
0
Product Specification
PA1ENH
R/W
1
0
®
F0830 Series
PA0ENH
R/W
0
0
62

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