MT48H4M16LFB4-75:H TR Micron Technology Inc, MT48H4M16LFB4-75:H TR Datasheet - Page 12

• Manufacturer Part Number: MT48H4M16LFB4-75:H TR
• Description: IC SDRAM 64MBIT 133MHZ 54VFBGA
• Manufacturer: Micron Technology Inc

Specifications of MT48H4M16LFB4-75:H TR

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 64M (4M x 16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-VFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 557-1392-2

Figure 6:
Temperature–Compensated Self Refresh (TCSR)
Partial-Array Self Refresh
PDF: 09005aef8237ed98/Source: 09005aef8237ed68
64mb_x16_Mobile SDRAM_Y24L_2.fm - Rev. C 10/07 EN
Extended Mode Register
Notes:
1. The on-die temperature sensor is used in place of TCSR. Setting these bits has no effect.
2. 1/2- and 1/4-bank settings will default to one-bank PASR.
On this version of the Mobile SDR SDRAM, a temperature sensor is implemented for
automatic control of the self refresh oscillator on the device. Therefore, it is recom-
mended not to program or use the TCSR control bits in the extended mode register.
Programming of the TCSR bits has no effect on the device. The self refresh oscillator will
continue refresh at the factory-programmed optimal rate for the device temperature.
For further power savings during SELF REFRESH, the PASR feature enables the
controller to select the amount of memory that will be refreshed during SELF REFRESH.
The following refresh options are available:
• All banks (banks 0, 1, 2, and 3)
• Two banks (banks 0 and 1; BA1 = 0)
• One bank (bank 0; BA1 = BA0 = 0)
WRITE and READ commands occur to any bank selected during standard operation, but
only the selected banks in PASR will be refreshed during SELF REFRESH. Data in unused
banks, or portions of banks, is lost when PASR is used.
E13
0
0
1
1
E12
0
1
0
1
Mode Register Definition
Base mode register
Reserved
Extended mode register
Reserved
BA1
1
13
E13
E6
0
0
0
1
1
BA0
12
E12
All must be set to “0”
E5
0
1
0
1
11
A11
E11
Reserved
Driver Strength
Half strength
Quarter strength
Full strength
10
A10
E10
9
A9
E9
12
E4
8
A8
E8
1
0
0
1
7
A7 A6 A5 A4 A3
E7 E6 E5 E4 E3
E3
1
0
1
0
6
DS
Maximum Case Temp.
E2
5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
0
0
0
0
1
1
1
1
TCSR
4
70°C
85°C
45°C
15°C
E1
0
0
1
1
0
0
1
1
64Mb: 4 Meg x 16 Mobile SDRAM
1
3
E0
0
0
1
0
1
0
1
1
A2 A1 A0
E2 E1 E0
2
PASR
1
Self Refresh Coverage
Four banks
Two banks
One bank
Reserved
Reserved
1/2 bank
1/4 bank
Reserved
0
Mode Register Definition
Address bus
Extended mode
register (Ex)
2
2
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