N25Q128A13BF840F NUMONYX, N25Q128A13BF840F Datasheet - Page 42

• Manufacturer Part Number: N25Q128A13BF840F
• Description: IC SRL FLASH 128MB NMX 8-VDFPN
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of N25Q128A13BF840F

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (16M x 8)
• Speed: 108MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Volatile and Non Volatile Registers
6.4.5
6.5
42/157
If the Volatile Enhanced Configuration Register bit 3 is set to 0, after any quad modify
instruction (both in Extended SPI protocol and QIO-SPI protocol) there is a maximum
allowed time-out of 200ms after the last instruction input is received and the memory is de-
selected to raise the Vpp signal to Vpph, otherwise the modify instruction start at normal
speed, without the Vpph enhancement, and a flag error appears on Flag Status Register bit
3.
Output Driver Strength VECR<2:0>
The bits from 2 to 0 of the VECR set the value of the output driver strength, enabling to
optimize the impedance at Vcc/2 output voltage for the specific application as described in
Table 7.: Volatile Enhanced Configuration
The default values of Output Driver Strength is set by the dedicated bits of the Non Volatile
Configuration Register (NVCR), the parts are delivered with the output impedance at Vcc/2
equal to 30 Ohms.
Flag Status Register
The Flag Status Register is a powerful tool to investigate the status of the device, checking
information regarding what is actually doing the memory and detecting possible error
conditions.
The Flag status register is composed by 8 bit.Three bits (Program/Erase Controller bit,
Erase Suspend bit and Program Suspend bit) are a “Status Indicator bit”, they are set and
reset automatically by the memory. Four bits (Erase error bit, Program error bit, VPP 1 to 0
error bit and Protection error bit) are “Error Indicators bits”, they are set by the memory
when some program or erase operation fails or the user tries to perform a forbidden
operation. The user can clear the Error Indicators bits by mean of the Clear Flag Status
Register (CLFSR) instruction.
All the Flag Status Register bits can be read by mean of the Read Status Register (RFSR)
instruction.
Table 8.
7
6
5
4
3
2
1
0
BIT
P/E Controller (not WIP)
Erase Suspend
Erase
Program
VPP
Program Suspend
Protection
RESERVED
Flag Status Register
Description
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Register.
Status
Status
Error
Error
Error
Status
Error
©2010 Micron Technology, Inc. All rights reserved.
Note
N25Q128 - 3 V