N25Q128A13BF840F NUMONYX, N25Q128A13BF840F Datasheet - Page 66

• Manufacturer Part Number: N25Q128A13BF840F
• Description: IC SRL FLASH 128MB NMX 8-VDFPN
• Manufacturer: NUMONYX
• Series: Forté™r

Specifications of N25Q128A13BF840F

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 128M (16M x 8)
• Speed: 108MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Instructions
9.1.10
9.1.11
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S
C
DQ0
DQ1
Write Enable (WREN)
The Write Enable (WREN) instruction sets the Write Enable Latch (WEL) bit. The Write
Enable Latch (WEL) bit must be set prior to every Program or Erase, instructions:
Page Program (PP), Dual Input Fast Program (DIFP), Dual Input Extended Fast Program
(DIEFP), Quad Input Fast Program (QIFP), Quad Input Extended Fast Program (QIEFP),
Program OTP (POTP), Write to Lock Register (WRLR), Subsector Erase (SSE), Sector
Erase (SE), Bulk Erase (BE), Write Status Register (WRSR), Write Volatile Configuration
Register (WRVCR), Write Volatile Enhanced Configuration Register (WRVECR) and Write
NV Configuration Register (WRNVCR) instruction.
The Write Enable (WREN) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
At the end of the POR sequence the WEL bit is low, so the next modify instruction can be
accepted.
Figure 19. Write Enable instruction sequence
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
High Impedance
0
1
2
Instruction
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
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AI13731
N25Q128 - 3 V