DS1875T+ Maxim Integrated Products, DS1875T+ Datasheet - Page 21

• Manufacturer Part Number: DS1875T+
• Description: IC SFP CTRLR/TRIPLEXER 38-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of DS1875T+

• Applications: Fiber Optics
• Interface: I²C
• Voltage - Supply: 2.85 V ~ 3.9 V
• Package / Case: *
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

If the weighting of the ADC digital reading must con-
form to a predetermined full-scale value defined by a
standard’s specification, then right-shifting can be used
to adjust the predetermined full-scale analog measure-
ment range while maintaining the weighting of the ADC
results. The DS1875’s range is wide enough to cover all
requirements; when the maximum input value is ≤ 1/2
the FS value, right-shifting can be used to obtain
greater accuracy. For instance, the maximum voltage
might be 1/8th the specified predetermined full-scale
value, so only 1/8th the converter’s range is used. An
alternative is to calibrate the ADC’s full-scale range to
1/8th the readable predetermined full-scale value and
use a right-shift value of 3. With this implementation, the
resolution of the measurement is increased by a factor
of 8, and because the result is digitally divided by 8 by
right-shifting, the bit weight of the measurement still
meets the standard’s specification (i.e., SFF-8472).
The right-shift operation on the ADC result is carried out
based on the contents of RIGHT SHIFT1/0 registers
(Table 02h, Registers 8Eh–8Fh). Four analog channels,
MON1–MON4, have 3 bits each allocated to set the
number of right-shifts. Up to seven right-shift operations
are allowed and are executed as a part of every con-
version before the results are compared to the high and
low alarm levels, or loaded into their corresponding
measurement registers (Table 01h, Registers
Figure 7. TX-F Timing
______________________________________________________________________________________
Right-Shifting ADC Result
DETECTION OF
DETECTION OF
TX-F FAULT
TX-F RESET
TX-F FAULT
TX-D OR
TX-F NONLATCHED OPERATION
TX-F LATCHED OPERATION
TX-F
TX-F
PON Triplexer and SFP Controller
62h–6Bh). This is true during the setup of internal cali-
bration as well as during subsequent data conversions.
The TX-F output has masking registers for the ADC
alarms and the QT alarms to select which comparisons
cause it to assert. In addition, the FETG alarm is selec-
table through the TX-F mask to cause TX-F to assert. All
alarms, with the exception of FETG, only cause TX-F to
remain active while the alarm condition persists.
However, the TX-F latch bit can enable the TX-F output
to remain active until it is cleared by the TX-F reset bit,
TX-D, SOFT TX-D, or by power cycling the part. If the
FETG output is configured to trigger TX-F, it indicates
that the DS1875 is in shutdown and requires TX-D,
SOFT TX-D, or cycling power to reset. Only enabled
alarms activate TX-F (see Figure 7). Table 4 shows
TX-F as a function of TX-D and the alarm sources.
Table 4. TX-F as a Function of TX-D and
Alarm Sources
V
CC
Yes
Yes
Yes
> V
No
POA
Transmit Fault (TX-F) Output
TX-D
X
0
0
1
NONMASKED
TX-F ALARM
X
0
1
X
TX-F
1
0
1
0
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