DS1875T+ Maxim Integrated Products, DS1875T+ Datasheet - Page 80

• Manufacturer Part Number: DS1875T+
• Description: IC SFP CTRLR/TRIPLEXER 38-TQFN
• Manufacturer: Maxim Integrated Products

Specifications of DS1875T+

• Applications: Fiber Optics
• Interface: I²C
• Voltage - Supply: 2.85 V ~ 3.9 V
• Package / Case: *
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PON Triplexer and SFP Controller
Table 02h, Register C0h: DPU
80
______________________________________________________________________________________
C0h
FACTORY DEFAULT
READ ACCESS
WRITE ACCESS
MEMORY TYPE
Controls the power-on values for D3, D2, D1, and D0 output pins and mux and invertion of the LOSI pin.
INV M3QT
BIT 7
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MUX M3QT
INV M3QT: Inverts the internal M3QT signal to output pin D2 if MUX M3QT is set. If MUX M3QT is
not set, this bit’s value is a don’t care.
0 = (Default) Noninverted M3QT to D2 pin.
1 = Inverted M3QT to D2 pin.
MUX M3QT: Chooses the control for D2 output pin.
0 = (Default) D2 is controlled by bit D2 IN found in byte 79h.
1 = M3QT is buffered to D2 pin.
INV LOS: Inverts the buffered input pin LOSI to output pin D0 if MUX LOS is set. If MUX LOS is
not set, this bit’s value is a don’t care.
0 = (Default) Noninverted LOSI to D0 pin.
1 = Inverted LOSI to D0 pin.
MUX LOS: Chooses the control for D0 output pin.
0 = (Default) DO is controlled by bit D0 IN found in byte 79h.
1 = LOSI is buffered to D0 pin.
D3 CNTL: At power-on, this bit’s value is loaded into bit D3 OUT of byte 78h to control the output
pin D3.
0 = (Default)
D2 CNTL: At power-on, this bit’s value is loaded into bit D2 OUT of byte 78h to control the output
pin D2.
0 = (Default)
D1 CNTL: At power-on, this bit’s value is loaded into bit D1 OUT of byte 78h to control the output
pin D1.
0 = (Default)
D0 CNTL: At power-on, this bit’s value is loaded into bit D0 OUT of byte 78h to control the output
pin D0.
0 = (Default)
00h
PW2
PW2
Nonvolatile (SEE)
INV LOS
MUX LOS
D3 CNTL
D2 CNTL
D1 CNTL
D0 CNTL
BIT 0