DS1875T+ Maxim Integrated Products, DS1875T+ Datasheet - Page 25

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DS1875T+

Manufacturer Part Number
DS1875T+
Description
IC SFP CTRLR/TRIPLEXER 38-TQFN
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS1875T+

Applications
Fiber Optics
Interface
I²C
Voltage - Supply
2.85 V ~ 3.9 V
Package / Case
*
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
two thresholds. The actual threshold values are a func-
tion of the number of right-shifts being used. Table 7
shows the threshold values for each possible number
of right-shifts.
The RSSI_FF and RSSI_FC (Table 02h, Register 89h)
bits are used to force fine-mode or coarse-mode con-
versions, or to disable the dual-range functionality.
Dual-range functionality is enabled by default (both
RSSI_FC and RSSI_FF are factory programmed to 0 in
EEPROM). It can be disabled by setting RSSI_FC to 0
Table 7. MON3 Hysteresis Threshold Values
* This is the minimum reported coarse-mode conversion.
Figure 11. PWM Controller Diagram
NO. OF RIGHT-
PWM DAC TEMPERATURE-
SHIFTS
MANUAL I
REFERENCED LUT
0
1
2
3
4
5
6
7
PWM CONTROLLER
TABLE 07h
2
C CONTROL
DS1875
______________________________________________________________________________________
FINE MODE
7FFCh
(MAX)
FFF8h
3FFEh
1FFFh
0FFFh
07FFh
03FFh
01FFh
PWM EN
MUX
PWM_FR[1:0]
PON Triplexer and SFP Controller
REGISTER FEh
TABLE 02h
PWM DAC
COARSE MODE
3C00h
03C0h
(MIN*)
F000h
7800h
1E00h
0F00h
0780h
01E0h
CYCLE OSC
90% DUTY
0 TO 1.25V
PWM DAC
RAMP
8-BIT
and RSSI_FF to 1. These bits are also useful when cali-
brating MON3. For additional information, see the
Memory Map section.
The DS1875 has a PWM controller that, when used with
external components, generates a low-noise, high-volt-
age output to bias APDs in optical receivers. The
achievable boost voltage is determined by the external
component selection. Figure 12 shows a typical
schematic. Selection of switching frequency, external
inductor, capacitors, resistor network, switching FET,
and switch diode determine the performance of the
DC-DC converter. The PWM controller can be config-
ured in boost or buck mode. Both modes require an
external nMOS or npn transistor.
The DS1875 PWM controller consists of several sec-
tions used to create a PWM signal to drive a DC-DC
converter. Figure 11 is a block diagram of the DS1875
PWM controller. Following is a description of each
block in the PWM controller and some guidelines for
selecting components for the DC-DC converter.
The PWM DAC is used to set the desired output voltage
of the DC-DC converter section. The feedback from the
DC-DC converter is compared to the output from the
PWM DAC by an error amplifier. If the FB level is less
10μA
10μA
AMPLIFIER
ERROR
VOLTAGE CLAMP
1.9V
1.0V
HIGH = 2.1V
LOW = 0.8V
GATE DRIVER
DUTY CYCLE
PWM Controller
90% MAX
M3QT
COMP
SW
FB
25

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