MCP3909RD-3PH1 Microchip Technology, MCP3909RD-3PH1 Datasheet - Page 40

• Manufacturer Part Number: MCP3909RD-3PH1
• Description: REF DESIGN MCP3909 3PH ENGY MTR
• Manufacturer: Microchip Technology

Specifications of MCP3909RD-3PH1

• Main Purpose: Power Management, Energy/Power Meter
• Embedded: No
• Utilized Ic / Part: MCP3909, PIC18F2520, PIC18F4550
• Primary Attributes: 3-Ph, 220 VAC, In Case, LCD, USB, GUI
• Secondary Attributes: Opto-Isolated Interface for Safety
• Operating Voltage: 220 V
• Operating Current: 5 A
• Description/function: Energy Meter
• For Use With/related Products: MCP3909
• Lead Free Status / RoHS Status: Not applicable / Not applicable

MCP3909 3-Phase Energy Meter Reference Design
3.5.22
3.5.23
3.5.24
DS51643B-page 36
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-2
bit 1
bit 0
W_GAIN
DELAY
R/W-0
R/W-0
MODE1_DEF
PHY_CAL_Status Register
STANDARD_W_RAW
CALIBRATION REGISTER: Calibration register status for offset, gain, LSB, and phase delay
1 = This register has been calibrated
0 = This register is NOT calibrated
Unimplemented: Read as ‘0’
STANDARD: Standard Phase Bit
1 = Standard Phase is THIS phase
0 = This phase is NOT the standard phase
I_RMS_OFF
W_GLSB
R/W-0
R/W-0
REGISTER 3-42:
Mode 1 default power-up settings. On power-up, this register will be read and placed
into the MOD1 register.
REGISTER 3-43:
The PHASE_Y CAL_STATUS registers holds the calibration status for each individual
phase. Broken down by phase, these are the values that can be calibrated. Each bit
has the status of ‘0’ = Not calibrated, ‘1’ = Calibrated.
REGISTER 3-44:
This calibration register holds the energy value that was accumulated during the
standard phase measurement under calibration configuration C1. The software will
read this value when performing phase to phase gain matching during active power
calibration.
STANDARD_W_RAW
MODE1_DEF
PHC_CAL_STATUS
PHA_CAL_STATUS
PHB_CAL_STATUS
W = Writable bit
‘1’ = Bit is set
V_RMS_OFF
Name
VA_GAIN
R/W-0
R/W-0
Name
Name
I_RMS_GAIN V_RMS_GAIN
MODE1_DEF REGISTER
PHY_CAL_STATUS REGISTERS
VA_GLSB
STANDARD_W_RAW REGISTER
R/W-0
R/W-0
Bits
16
Bits
48
Bits
16
16
16
Address
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
0x1B0
VAR_GAIN
Address
0x1B8
R/W-0
R/W-0
Address
0x1B2
0x1B4
0x1B6
R/W
Cof
I_RMS_GLSB
R/W
Cof
VAR_GLSB
R/W-0
R/W-0
R/W
R/W
R/W
Cof
© 2008 Microchip Technology Inc.
x = Bit is unknown
V_RMS_GLSB
R/W-0
U-0
—
STANDARD
W_OFF
R/W-0
R/W-0
bit 8
bit 0