MCP3909EV-MCU16 Microchip Technology, MCP3909EV-MCU16 Datasheet - Page 89

• Manufacturer Part Number: MCP3909EV-MCU16
• Description: EVALUATION BOARD FOR MCP3909
• Manufacturer: Microchip Technology

Specifications of MCP3909EV-MCU16

• Number Of Adc's: 2
• Number Of Bits: 16
• Sampling Rate (per Second): 15k
• Data Interface: Serial
• Inputs Per Adc: 1 Differential
• Input Range: ±1 V
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: MCP3909
• Silicon Manufacturer: Microchip
• Application Sub Type: ADC
• Kit Application Type: Data Converter
• Silicon Core Number: MCP3909
• Kit Contents: Board
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

C.6
© 2009 Microchip Technology Inc.
IMPROVING MEASUREMENT PRECISION OF QUASI-SYNCHRONOUS
SAMPLING ALGORITHM
When using the quasi-synchronous sampling method for harmonic analysis and
calculation of power as well as voltage and current, strict restrictions apply for the
algorithm and compensation, (i.e., the frequency offset must not exceed 1% of the
central frequency). Precision of the result increases as the frequency offset gets less.
Measurement accuracy is not guaranteed, if this condition can not be met. Figure C-4
shows the quasi-synchronization algorithm using 3 iterations with input signal ranging
from 47.5 Hz to 52.5 Hz. The algorithm is for calculating the active power, the reactive
power and the relative error of current and voltage. Figure C-4 shows that the algorithm
works well when the frequency falls in the range of 47.5 Hz to 52.5 Hz. As the
frequency deviates from the range, the error increases significantly. Therefore, the
algorithm needs to be improved to fit into more applications with a more relaxed
restriction.
FIGURE C-4:
The quasi-sync sampling algorithm has relative high accuracy in frequency measure-
ment and the error can be less than 0.005 Hz. If the frequency range to be measured
can be segmented to make the frequency input closest to the multiple of cycle point,
and processed using appropriate quasi-sync window function and sine/cosine tale,
then the algorithm can be used for a much wider range of frequency .
Figure C-5 is the error analysis of the improved 3-iteration quasi-synchronous
algorithm at 3.2 ksps. It shows that the relative error for each result can be well
controlled when the frequency of the input signal falls in the range of 47.5 Hz to
52.5 Hz.
Figure C-5 clearly shows that the relative errors of the current, voltage, active power
and reactive power in the entire frequency range are less than 0.08%. Also, when the
input frequency is around the multiple of cycle frequencies (52.459 Hz, 51.613 Hz,
50.794 Hz, 50.0 Hz, 49.231 Hz, 48.485 Hz and 47.761 Hz), the calculateion error is
Quasi-sync Algorithm Error Analysis of 3 Iterations.
Power Calculation Theory
DS51723A-page 89