EVAL-ADT7467EB Analog Devices Inc, EVAL-ADT7467EB Datasheet - Page 74

BOARD EVALUATION FOR ADT7467

EVAL-ADT7467EB

Manufacturer Part Number
EVAL-ADT7467EB
Description
BOARD EVALUATION FOR ADT7467
Manufacturer
Analog Devices Inc
Series
dBCool®r
Datasheet

Specifications of EVAL-ADT7467EB

Sensor Type
Temperature
Sensing Range
-40°C ~ 120°C
Interface
SMBus (2-Wire/I²C)
Sensitivity
±1.5°C
Voltage - Supply
3 V ~ 5.5 V
Embedded
No
Utilized Ic / Part
ADT7467
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
ADT7467
Table 50. Register 0x78—Configuration Register 3 (Power-On Default = 0x00)
Bit
<0>
<1>
<2>
<3>
<4>
<5>
<6>
<7>
1
Table 51. Register 0x79— THERM Timer Status Register (Power-On Default = 0x00)
Bit
<7:1>
<0>
Table 52. Register 0x7A— THERM Timer Limit Register (Power-On Default = 0x00)
Bit
<7:0>
This register becomes a read-only register when the Configuration Register 1 lock bit is set to 1. Any subsequent attempts to write to this register fail.
Name
ALERT
THERM
BOOST
FAST
DC1
DC2
DC3
DC4
Name
TMR
ASRT/
TMR0
Name
LIMT
R/W
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
Read/write
R/W
Read only
Read only
R/W
Read/write
1
Description
ALERT = 1, Pin 5 (PWM2/SMBALERT) is configured as an SMBALERT interrupt output to indicate out-
of-limit error conditions.
THERM Enable = 1 enables THERM timer monitoring functionality on Pin 9. Also determined by Bits
0 and 1 (PIN9FUNC) of Configuration Register 4. When THERM is asserted, the fans run at full speed
if the fans are running and the boost bit is set. Alternatively, THERM can be programmed so that a
timer is triggered to time how long THERM has been asserted.
When THERM is an input and BOOST = 1, assertion of THERM causes all fans to run at the maximum
programmed duty cycle for fail-safe cooling.
FAST = 1 enables fast TACH measurements on all channels. This increases the TACH measurement
rate from once per second to once every 250 ms (4 ×).
DC1 = 1 enables TACH measurements to be continuously made on TACH1. Fans must be driven by
dc. Setting this bit prevents pulse stretching, because it is not required for dc-driven motors.
DC2 = 1 enables TACH measurements to be continuously made on TACH2. Fans must be driven by
dc. Setting this bit prevents pulse stretching, because it is not required for dc-driven motors.
DC3 = 1 enables TACH measurements to be continuously made on TACH3. Fans must be driven by
dc. Setting this bit prevents pulse stretching, because it is not required for dc-driven motors.
DC4 = 1 enables TACH measurements to be continuously made on TACH4. Fans must be driven by
dc. Setting this bit prevents pulse stretching, because it is not required for dc-driven motors.
Description
Times how long THERM input is asserted. These seven bits read 0 until the THERM assertion time
exceeds 45.52 ms.
This bit is set high upon the assertion of the THERM input and is cleared upon a read. If the THERM
assertion time exceeds 45.52 ms, this bit is set and becomes the LSB of the 8-bit TMR reading. This
allows THERM assertion times from 45.52 ms to 5.82 sec to be reported back with a resolution of
22.76 ms.
Description
Sets the maximum THERM assertion length before an interrupt is generated. This is an 8-bit limit
with a resolution of 22.76 ms, allowing THERM assertion limits of 45.52 ms to 5.82 sec to be
programmed. If the THERM assertion time exceeds this limit, Bit 5 (F4P) of Interrupt Status Register 2
(Reg. 0x42) is set. If the limit value is 0x00, an interrupt is generated immediately upon the assertion of
the THERM input.
Rev. A | Page 74 of 80

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