ADZS-BF527-EZLITE Analog Devices Inc, ADZS-BF527-EZLITE Datasheet - Page 49

• Manufacturer Part Number: ADZS-BF527-EZLITE
• Description: BOARD EVAL ADSP-BF527
• Manufacturer: Analog Devices Inc
• Series: Blackfin®r
• Type: DSPr

Specifications of ADZS-BF527-EZLITE

• Featured Product: Blackfin® BF50x Series Processors
• Contents: Evaluation Board
• Silicon Manufacturer: Analog Devices
• Core Architecture: Blackfin
• Features: USB-based, PC-hosted Tool Set
• Silicon Core Number: ADSP-BF527
• Silicon Family Name: Blackfin
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: ADSP-BF527
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Preliminary Technical Data
Serial Ports
Table 37
through
Table 37. Serial Ports—External Clock
1
2
Table 38. Serial Ports—Internal Clock
1
2
Parameter
Timing Requirements
t
t
t
t
t
t
Switching Characteristics
t
t
t
t
Parameter
Timing Requirements
t
t
t
t
Switching Characteristics
t
t
t
t
t
t
Referenced to sample edge.
Referenced to drive edge.
Referenced to sample edge.
Referenced to drive edge.
SFSE
HFSE
SDRE
HDRE
SCLKEW
SCLKE
DFSE
HOFSE
DDTE
HDTE
SFSI
HFSI
SDRI
HDRI
SCLKIW
SCLKI
DFSI
HOFSI
DDTI
HDTI
Figure 25 on Page 51
through
Table 40 on Page 51
TFSx/RFSx Setup Before TSCLKx/RSCLKx
TFSx/RFSx Hold After TSCLKx/RSCLKx
Receive Data Setup Before RSCLKx
Receive Data Hold After RSCLKx
TSCLKx/RSCLKx Width
TSCLKx/RSCLKx Period
TFSx/RFSx Delay After TSCLKx/RSCLKx
(Internally Generated TFSx/RFSx)
TFSx/RFSx Hold After TSCLKx/RSCLKx
(Internally Generated TFSx/RFSx)
Transmit Data Delay After TSCLKx
Transmit Data Hold After TSCLKx
TFSx/RFSx Setup Before TSCLKx/RSCLKx
TFSx/RFSx Hold After TSCLKx/RSCLKx
Receive Data Setup Before RSCLKx
Receive Data Hold After RSCLKx
TSCLKx/RSCLKx Width
TSCLKx/RSCLKx Period
TFSx/RFSx Delay After TSCLKx/RSCLKx
(Internally Generated TFSx/RFSx)
TFSx/RFSx Hold After TSCLKx/RSCLKx
(Internally Generated TFSx/RFSx)
Transmit Data Delay After TSCLKx
Transmit Data Hold After TSCLKx
describe serial port operations.
and
Figure 23 on Page 50
Rev. PrG | Page 49 of 80 | February 2009
1
1
1
1
2
1
2
1
1
1
1
1
1
1
1
1
Min
18.0
Min
11.3
–1.5
11.3
–1.5
18.0
3.0
3.0
3.0
3.6
5.4
0.0
0.0
5.4
ADSP-BF522/524/526
ADSP-BF522/524/526
4.0
1.8
V
V
1.8 V
1.8 V
DDEXT
DDEXT
ADSP-BF522/523/524/525/526/527
Max
Max
12.0
12.0
3.0
3.0
=
=
Min
18.0
Min
11.3
–1.5
11.3
–1.5
18.0
3.0
3.0
3.0
3.6
5.4
0.0
0.0
5.4
2.5/3.3 V
2.5/3.3 V
4.0
1.8
V
V
DDEXT
DDEXT
Max
Max
12.0
12.0
3.0
3.0
=
=
Min
20.0
Min
11.0
–1.5
11.0
–1.5
20.0
3.0
3.0
3.0
3.5
7.0
0.0
0.0
4.5
ADSP-BF523/525/527
ADSP-BF523/525/527
1.0
1.8
V
V
DDEXT
1.8 V
DDEXT
1.8 V
Max
Max
10.0
10.0
3.0
3.0
=
=
Min
15.0
Min
–1.5
–1.5
15.0
3.0
3.0
3.0
3.0
4.5
0.0
0.0
9.6
9.6
4.5
2.5/3.3 V
2.5/3.3 V
1.0
1.5
V
V
DDEXT
DDEXT
Max Unit
Max Unit
10.0 ns
10.0 ns
3.0
3.0
=
=
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns