C8051F326DK Silicon Laboratories Inc, C8051F326DK Datasheet - Page 35

• Manufacturer Part Number: C8051F326DK
• Description: KIT DEV FOR C8051F326/7
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F326DK

• Contents: Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
• Processor To Be Evaluated: C8051F326/F327
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F326
• Silicon Family Name: C8051F32x
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: Silicon Laboratories C8051F326, C8051F327
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1306

6.
The MCU system controller core is the CIP-51 microcontroller. The CIP-51 is fully compatible with the
MCS-51™ instruction set; standard 803x/805x assemblers and compilers can be used to develop soft-
ware. The MCU family has a superset of all the peripherals included with a standard 8051. Included are
two 16-bit counter/timers (see description in Section “14. Timers” on page 127), an enhanced full-duplex
UART (see description in Section “13. UART0” on page 117), 256 bytes of internal RAM, 128 byte Special
Function Register (SFR) address space (Section “6.2.6. Special Function Registers” on page 43), and 15
Port I/O (see description in Section “11. Port Input/Output” on page 79). The CIP-51 also includes on-chip
debug hardware (see description in Section “15. C2 Interface” on page 135), and interfaces directly with
the USB and other digital subsystems providing a complete solution in a single integrated circuit.
The CIP-51 Microcontroller core implements the standard 8051 organization and peripherals as well as
additional custom peripherals and functions to extend its capability (see Figure 6.1 for a block diagram).
The CIP-51 includes the following features:
- Fully Compatible with MCS-51 Instruction
- 25 MIPS Peak Throughput with 25 MHz
- 0 to 25 MHz Clock Frequency
- 256 Bytes of Internal RAM
CIP-51 Microcontroller
Set
Clock
RESET
CLOCK
STOP
IDLE
ACCUMULATOR
PROGRAM COUNTER (PC)
CONTROL
PSW
PRGM. ADDRESS REG.
LOGIC
Figure 6.1. CIP-51 Block Diagram
POWER CONTROL
PC INCREMENTER
DATA POINTER
REGISTER
BUFFER
TMP1
PIPELINE
ALU
TMP2
DATA BUS
DATA BUS
Rev. 1.1
D8
D8
D8
A16
D8
D8
D8
D8
B REGISTER
- 15 Port I/O
- Extended Interrupt Handler
- Reset Input
- Power Management Modes
- On-chip Debug Logic
- Program and Data Memory Security
REGISTER
ADDRESS
INTERFACE
INTERFACE
INTERRUPT
INTERFACE
MEMORY
SRAM
SFR
BUS
MEM_WRITE_DATA
SFR_WRITE_DATA
MEM_READ_DATA
STACK POINTER
(256 X 8)
SFR_READ_DATA
SRAM
MEM_CONTROL
EMULATION_IRQ
MEM_ADDRESS
SFR_CONTROL
SFR_ADDRESS
SYSTEM_IRQs
C8051F326/7
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