C8051T630DK Silicon Laboratories Inc, C8051T630DK Datasheet - Page 111

• Manufacturer Part Number: C8051T630DK
• Description: KIT DEV FOR C8051T630 FAMILY
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051T630DK

• Contents: Board, daughter boards, power adapter, cables, documentation and software
• Processor To Be Evaluated: C8051T63x
• Interface Type: USB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: C8051T630, T631, T632, T633, T634 and T635 MCUs
• For Use With: 336-1465 - BOARD SOCKET DAUGHTER 20-QFN
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1464

20.1.3. Interfacing Port I/O to 5V Logic
All Port I/O configured for digital, open-drain operation are capable of interfacing to digital logic operating at
a supply voltage higher than VDD and less than 5.25 V. An external pullup resistor to the higher supply
voltage is typically required for most systems.
Important Note: In a multi-voltage interface, the external pullup resistor should be sized to allow a current
of at least 150 µA to flow into the Port pin when the supply voltage is between (VDD + 0.6 V) and (VDD +
1.0 V). Once the Port pin voltage increases beyond this range, the current flowing into the Port pin is mini-
mal.
WEAKPUD
(Weak Pull-Up Disable)
Px.x – Output
Logic Value
(Port Latch or
Crossbar)
PxMDOUT.x
(1 for push-pull)
(0 for open-drain)
XBARE
(Crossbar
Enable)
Px.x – Input Logic Value
(Reads 0 when pin is configured as an analog I/O)
To/From Analog
Peripheral
PxMDIN.x
(1 for digital)
(0 for analog)
Figure 20.2. Port I/O Cell Block Diagram
Rev. 1.0
C8051T630/1/2/3/4/5
VDD
GND
VDD
(WEAK)
PORT
PAD
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