C8051T630DK Silicon Laboratories Inc, C8051T630DK Datasheet - Page 33

KIT DEV FOR C8051T630 FAMILY

C8051T630DK

Manufacturer Part Number
C8051T630DK
Description
KIT DEV FOR C8051T630 FAMILY
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051T630DK

Contents
Board, daughter boards, power adapter, cables, documentation and software
Processor To Be Evaluated
C8051T63x
Interface Type
USB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051T630, T631, T632, T633, T634 and T635 MCUs
For Use With
336-1465 - BOARD SOCKET DAUGHTER 20-QFN
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1464
6. 10-Bit ADC (ADC0, C8051T630/2/4 only)
ADC0 on the C8051T630/2/4 is a 500 ksps, 10-bit successive-approximation-register (SAR) ADC with
integrated track-and-hold, a gain stage programmable to 1x or 0.5x, and a programmable window detector.
The ADC is fully configurable under software control via Special Function Registers. The ADC may be con-
figured to measure various different signals using the analog multiplexer described in Section “6.5. ADC0
Analog Multiplexer (C8051T630/2/4 only)” on page 43. The voltage reference for the ADC is selected as
described in Section “9. Voltage Reference Options” on page 52. The ADC0 subsystem is enabled only
when the AD0EN bit in the ADC0 Control register (ADC0CN) is set to logic 1. The ADC0 subsystem is in
low power shutdown when this bit is logic 0.
AMUX0
From
X1 or
X0.5
AMP0GN0
Figure 6.1. ADC0 Functional Block Diagram
AIN
ADC0CF
ADC
10-Bit
VDD
SAR
Rev. 1.0
ADC0GTH ADC0GTL
ADC0LTH
ADC0CN
C8051T630/1/2/3/4/5
ADC0LTL
Conversion
Start
000
001
010
011
100
101
32
AD0WINT
Compare
Window
CNVSTR Input
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
Timer 3 Overflow
Logic
33

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