MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 39
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MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 22
Freescale Semiconductor
At recommended operating conditions with L/TV
Fall time (20%–80%)
Notes:
1. In general, the clock reference symbol representation for this section is based on the symbols RGT to represent RGMII and
2. This implies that PC board design will require clocks to be routed such that an additional trace delay of greater than 1.5 ns
3. For 10 and 100 Mbps, t
4. Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet's clock domains as long
5. Guaranteed by design.
RTBI timing. For example, the subscript of t
(R) and fall (F) times follows the clock symbol that is being represented. For symbols representing skews, the subscript is
skew (SK) followed by the clock that is being skewed (RGT).
will be added to the associated clock signal.
as the minimum duty cycle is not violated and stretching occurs for no more than three t
between.
(At Transmitter)
shows the RGMII and RTBI AC timing and multiplexing diagrams.
RXD[8:5][3:0]
RXD[7:4][3:0]
TXD[8:5][3:0]
TXD[7:4][3:0]
(At Receiver)
Parameter/Condition
GTX_CLK
GTX_CLK
(At PHY)
(At PHY)
RX_CTL
RX_CLK
TX_CLK
TX_CTL
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Figure 22. RGMII and RTBI AC Timing and Multiplexing Diagrams
Table 37. RGMII and RTBI AC Timing Specifications (continued)
RGT
scales to 400 ns ± 40 ns and 40 ns ± 4 ns, respectively.
RXD[3:0]
TXD[3:0]
DD
RXD[4]
TXD[4]
TXEN
RXDV
of 2.5 V ± 5%.
RGT
represents the TBI (T) receive (RX) clock. Note also that the notation for rise
RXD[8:5]
RXD[7:4]
TXD[8:5]
TXD[7:4]
RXERR
TXERR
RXD[9]
TXD[9]
Symbol
t
RGTF
1
t
t
Enhanced Three-Speed Ethernet (eTSEC), MII Management
SKRGT_TX
SKRGT_TX
Min
—
t
t
RGTH
RGTH
Typ
—
RGT
t
t
of the lowest speed transitioned
RGT
RGT
Max
0.75
t
t
SKRGT_RX
SKRGT_RX
Unit
ns
Notes
—
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