MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 63
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 63 of 117
- Download datasheet (2Mb)
Figure 42
Figure 43
16 High-Speed Serial Interfaces (HSSI)
The MPC8544E features two serializer/deserializer (SerDes) interfaces to be used for high-speed serial
interconnect applications.The SerDes1 dedicated for PCI Express data transfers. The SerDes2 can be used
for PCI Express and/or SGMII application. This section describes the common portion of SerDes DC
electrical specifications, which is the DC requirement for SerDes Reference Clocks. The SerDes data
lane’s transmitter and receiver reference circuits are also shown.
16.1
The SerDes utilizes differential signaling to transfer data across the serial link. This section defines terms
used in the description and specification of differential signals.
Figure 44
description. The figure shows waveform for either a transmitter output (SDn_TX and SDn_TX) or a
receiver input (SDn_RX and SDn_RX). Each signal swings between A Volts and B Volts where A > B.
Freescale Semiconductor
Signal Terms Definition
shows the PCI input AC timing conditions.
shows the PCI output AC timing conditions.
shows how the signals are defined. For illustration purpose, only one SerDes lane is used for
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
High-Impedance
Figure 43. PCI Output AC Timing Measurement Condition
Figure 42. PCI Input AC Timing Measurement Conditions
Output Delay
Input
CLK
Output
CLK
t
PCIVKH
t
PCKHOZ
t
PCKHOV
t
PCIXKH
High-Speed Serial Interfaces (HSSI)
63
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