MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 51
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 51 of 117
- Download datasheet (2Mb)
Freescale Semiconductor
LA[27:31]/LBCTL/LBCKE/LOE/
Internal Launch/Capture Clock
LSDA10/LSDWE/LSDRAS/
Output (Address) Signal:
LSDCAS/LSDDQM[0:3]
Output (Data) Signals:
LAD[0:31]/LDP[0:3]
LAD[0:31]/LDP[0:3]
Output Signals:
In PLL bypass mode, LCLK[n] is the inverted version of the internal clock
with the delay of t
edge of the internal clock and are captured at falling edge of the internal
clock withe the exception of LGTA/LUPWAIT (which is captured on the
rising edge of the internal clock).
Input Signals:
Input Signal:
MPC8544E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
LUPWAIT
LAD[0:31]
LCLK[n]
LGTA
LALE
Figure 29. Local Bus Signals (PLL Bypass Mode)
LBKHKT
. In this mode, signals are launched at the rising
t
LBKLOV1
t
LBKLOV2
NOTE
t
LBKLOV3
t
LBKHKT
t
LBIVKH1
t
LBOTOT
t
t
LBKLOX2
LBKLOX1
t
LBIXKH1
t
LBIVKL2
t
LBIXKL2
Local Bus
t
t
LBKLOZ1
LBKLOZ2
51
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