M5249C3 Freescale Semiconductor, M5249C3 Datasheet - Page 19

• Manufacturer Part Number: M5249C3
• Description: KIT EVAL FOR M5249 W/ETHERNET
• Manufacturer: Freescale Semiconductor
• Series: ColdFire®r
• Type: Microprocessorr

Specifications of M5249C3

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MCF5249
• Interface Type: RS-232, Ethernet
• For Use With/related Products: MCF5249
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

2.2.2
The act of powering up the board will initialize the system. The processor is reset and dBUG is invoked.
dBUG performs the following configurations of internal resources during the initialization. The
instruction cache is invalidated and disabled. The Vector Base Register, VBR, points to the Flash.
However, a copy of the exception table is made at address $00000000 in SDRAM. To take over an
exception vector, the user places the address of the exception handler in the appropriate vector in the vector
table located at 0x00000000, and then points the VBR to 0x00000000.
The Software Watchdog Timer is disabled and internal timers are placed in a stop condition. Interrupt
controller registers initialized with unique interrupt level/priority pairs. Please refer to the dBUG source
files on the ColdFire website (http://www.freescale.com/coldfire) for the complete initialization code
sequence.
After initialization, the terminal will display:
Hard Reset
DRAM Size: 8M
Freescale Semiconductor
System Initialization
Command
Execute
Function
Figure 2-1. Flow Diagram of dBUG Operational Mode
No
M5249C3 User’s Manual, Rev. 1
Does Command Line
Cause User Program
Input From Terminal
Command Line
Execution
Initialize
Yes
Yes
No
Begin Execution
Jump To User
Program And
Using the Monitor/Debug Firmware
2-3