M30260F6AGP#U5A Renesas Electronics America, M30260F6AGP#U5A Datasheet - Page 170

• Manufacturer Part Number: M30260F6AGP#U5A
• Description: IC M16C MCU FLASH 48K 48LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/Tiny/26r

Specifications of M30260F6AGP#U5A

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: I²C, IEBus, SIO, UART/USART
• Peripherals: DMA, PWM, Voltage Detect, WDT
• Number Of I /o: 39
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: R8C
• Device Core Size: 16b
• Frequency (max): 20MHz
• Interface Type: UART
• Total Internal Ram Size: 2KB
• # I/os (max): 39
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 12-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Package: 48LQFP
• Family Name: R8C
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 39
• Number Of Timers: 8
• For Use With: R0K33026AS000BE - KIT DEV EVALUATION M16C/26A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

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Table 13.1.2.2. Registers to Be Used and Settings in UART Mode
NOTES:
i=0 to 2
0
6
Register
UiTB
UiRB
UiBRG
UiMR
UiC0
UiC1
U2SMR
U2SMR2
U2SMR3
U2SMR4
UCON
2
9
C
0 .
B
1. The bits used for transmit/receive data are as follows: Bit 0 to bit 6 when transfer data is 7 bits long; bit 0 to
2. Set the bit 4 to bit 5 in the U0C1 and U1C1 registers to “0”. The U0IRS, U1IRS, U0RRM and U1RRM bits
3. Set the bit 6 to bit 7 in the U0C1 and U1C1 registers to “0”.
4. Set the bit 7 the U0MR and U1MR registers to “0”.
2 /
0
0
2
6
bit 7 when transfer data is 8 bits long; bit 0 to bit 8 when transfer data is 9 bits long.
are included in the UCON register.
0
A
F
2
e
0 -
G
b
1 .
2
o r
0
, 5
u
0
SMD2 to SMD0
0 to 8
0 to 8
OER,FER,PER,SUM Error flag
0 to 7
CKDIR
STPS
PRY, PRYE
IOPOL(i=2)
CLK0, CLK1
CRS
TXEPT
CRD
NCH
CKPOL
UFORM
TE
TI
RE
RI
U2IRS
U2RRM
U2LCH
U2ERE
0 to 7
0 to 7
0 to 7
0 to 7
U0IRS, U1IRS
U0RRM, U1RRM
CLKMD0
CLKMD1
RCSP
7
p
2
0
(
0
M
Bit
7
1
(2)
6
(3)
(3)
(2)
C
page 151
2 /
(4)
6
, A
M
1
f o
6
Set these bits to ‘100
Set transmission data
Reception data can be read
Set a transfer rate
Set these bits to ‘101
Set these bits to ‘110
Select the internal clock or external clock
Select the stop bit
Select whether parity is included and whether odd or even
Select the TxD/RxD input/output polarity
Select the count source for the UiBRG register
Select CTS or RTS to use
Transmit register empty flag
Enable or disable the CTS or RTS function
Select TxDi pin output mode
Set to “0”
LSB first or MSB first can be selected when transfer data is 8 bits long. Set this
bit to “0” when transfer data is 7 or 9 bits long.
Set this bit to “1” to enable transmission
Transmit buffer empty flag
Set this bit to “1” to enable reception
Reception complete flag
Select the source of UART2 transmit interrupt
Set to “0”
Set this bit to “1” to use UART2 inverted data logic
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Set to “0”
Select the source of UART0/UART1 transmit interrupt
Set to “0”
Invalid because CLKMD1 = 0
Set to “0”
Set this bit to “1” to accept as input the UART0 CTS
Set to “0”
3
C
2
2 /
9
6
, B
_______
M
1
6
C
_______
2 /
6
) T
2
2
2
Function
’ when transfer data is 7 bits long
’ when transfer data is 8 bits long
’ when transfer data is 9 bits long
_______
(1)
(1)
_______
_________
0
signal from the P6
4
pin or P7
13. Serial I/O
0
pin