MPC561MZP56 Freescale Semiconductor, MPC561MZP56 Datasheet - Page 1170

• Manufacturer Part Number: MPC561MZP56
• Description: IC MPU 32BIT 56MHZ PPC 388-PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC561MZP56

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 56MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 64
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 388-BGA
• Controller Family/series: POWER 5xx
• No. Of I/o's: 56
• Ram Memory Size: 31KB
• Cpu Speed: 56MHz
• No. Of Timers: 32
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 12
• Rohs Compliant: No
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 22
• Operating Supply Voltage: 2.6 V to 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: No

TPU3 ROM Functions
D-18
0
ADDRESS OFFSETS
1
0x30XXWC
0x30XXWE
0x30XXW0
0x30XXW2
0x30XXW4
0x30XXW6
0x30XXW8
0x30XXWA
2
0
0
0
3
1
1
1
0
0
cChannel Function Select
cHost Sequence
cHost Service Request
cChannel Priority
cChannel Interrupt Status
= Written By RCPU
= Written By TPU
Channel Inerrput Enable
NAME
0
1
MPC561/MPC563 Reference Manual, Rev. 1.2
NO_OF_STATES
2
Figure D-10. COMM Parameters
3
xxxx – COMM Function Number. Assigned
during microcode assembly. See
Table D-1
00 – Sensorless Match Update Mode
01 – Sensorless Match Update Mode
10 – Sensorless Link Update Mode
11 – Sensorled Mode
00 – No Host Service (Reset Condition)
01 – Not Used
10 – Initialize or Force State
11 – Initialize or Force Immediate State Test
00 – Disabled
01 – Low Priority
10 – Medium Priority
11 – High Priority
0 – Channel Interrupt Disabled
1 – Channel Interrupt Enabled
0 – Channel Interrupt Not Asserted
1 – Channel Interrupt Asserted
4
PARAMETER RAM
START_LINK_
CONTROL BITS
CHANNEL
= Written by RCPU and TPU
= Unused Parameters
5
UPDATE_PERIOD
6
OFFSET
LOWER
UPPER
7
OPTIONS
BITS
8
9
COUNTER_ADDR
10 11 12 13 14 15
STATE_NO
W = Channel Number
For address offsets: XX=41 for
TPU_A, 45 for TPU_B
YY=40 for TPU_A,
See
44 for TPU_B
Table 19-24
0x30YY1C – 0x30YY1E
0x30YY0C – 0x30YY12
0x30YY18 – 0x30YY1A
0x30YY14 – 0x30YY16
Freescale Semiconductor
ADDRESSES
0x30YY0A
0x30YY20
for the
Param 0
Param 1
Param 2
Param 3
Param 4
Param 5
Param 6
Param 7