MC68332ACAG16 Freescale Semiconductor, MC68332ACAG16 Datasheet - Page 247

• Manufacturer Part Number: MC68332ACAG16
• Description: IC MCU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, UART
• Minimum Operating Temperature: - 40 C
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

BP, BC, BH, BL, BM, and BT — Breakpoint Enable Bits
D.5.4 DSSR — Development Support Status Register
BKPT — Breakpoint Asserted Flag
PCBK — PC Breakpoint Flag
CHBK — Channel Register Breakpoint Flag
SRBK — Service Request Breakpoint Flag
TPUF — TPU FREEZE Flag
D.5.5 TICR — TPU Interrupt Configuration Register
MC68332
USER’S MANUAL
15
15
0
0
0
0
DSCR[5:0] are TPU breakpoint enables. Setting a bit enables a breakpoint condition.
BP — Break if mPC equals mPC breakpoint register.
BC — Break if CHAN register equals channel breakpoint register at beginning of state
BH — Break if host service latch is asserted at beginning of state.
BL — Break if link service latch is asserted at beginning of state.
BM — Break if MRL is asserted at beginning of state.
BT — Break if TDL is asserted at beginning of state.
If an internal breakpoint caused the TPU to enter the halted state, the TPU asserts the
BKPT signal on the IMB and the BKPT flag. The TPU continues to assert BKPT until
it recognizes a breakpoint acknowledge cycle from a host, or until the FREEZE signal
on the IMB is asserted.
PCBK is asserted if a breakpoint occurs because of a PC register match with the PC
breakpoint register. PCBK is negated when the BKPT flag is negated.
CHBK is asserted if a breakpoint occurs because of a CHAN register match with the
channel register breakpoint register. CHBK is negated when the BKPT flag is negated.
SRBK is asserted if a breakpoint occurs because of any of the service request latches
being asserted along with their corresponding enable flag in the development support
control register. SRBK is negated when the BKPT flag is negated.
TPUF is asserted whenever the TPU is in a halted state as a result of FREEZE being
asserted. This flag is automatically negated when the TPU exits the halted state be-
cause of FREEZE being negated.
RESET:
RESET:
14
14
0
0
0
0
or when CHAN is changed through microcode.
13
13
0
0
0
0
12
12
0
0
0
0
Freescale Semiconductor, Inc.
11
11
For More Information On This Product,
0
0
0
0
10
10
0
0
0
Go to: www.freescale.com
REGISTER SUMMARY
CIRL
9
0
0
0
8
0
0
8
0
BKPT
7
0
7
0
PCBK
6
0
0
CIBV
CHBK
5
0
0
SRBK
4
0
4
0
TPUF
3
0
3
0
0
2
0
0
2
0
0
$YFFE06
$YFFE08
1
0
0
1
0
0
D-33
0
0
0
0
0
0