MC68332ACAG16 Freescale Semiconductor, MC68332ACAG16 Datasheet - Page 262

• Manufacturer Part Number: MC68332ACAG16
• Description: IC MCU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, UART
• Minimum Operating Temperature: - 40 C
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

ECLK 4-15
EDIV 4-15
End queue pointer 6-9
ENDQP 6-9
Error flags, SCI 6-29
Exception vector table 6-3
Exceptions
EXTAL 4-7
Extend (X) 5-5
External bus clock signal (ECLK) 4-15
External bus interface (EBI) 4-1
External clock division (EDIV) 4-15
FAR 5-20
Fast termination 4-26
Fault address register (FAR) 5-20
FE 6-29
Features 3-1
Frame 6-26
Framing error (FE) flag 6-29
Framing errors 6-29
FREEZE 4-9
Freeze bus monitor (FRZBM) 4-9
Freeze operation 6-3
Freeze software watchdog (FRZSW) 4-9
FRZ 6-3
FRZBM 4-9
FRZSW 4-9
General-purpose I/O 4-58
HALT 4-20
Halt signal (HALT) 4-20
Hardware breakpoint 4-28
IARB 4-3, 4-4, 4-47, 4-56, 7-5
Idle frame 6-26
Idle line interrupt enable (ILIE) 6-30
Idle line type (ILT) 6-29
Idle-line detection 6-29
Idle-line wakeup 6-30
IFETCH 5-22
ILIE 6-30
ILQSPI 6-3
ILSCI 6-3
ILT 6-29
IMB 3-9
Instruction execution
I-2
internal 5-14
processing 5-15
–G–
–H–
–F–
–I–
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Instruction set 5-9
Instructions
instructions
Intermodule bus (IMB) 3-9
Internal bus monitor 4-5
Internal DSACK generation 4-55
Internal loop 6-30
Internal queue pointer 6-9
Interrupt arbitration (IARB) 4-3
Interrupt handler routines 6-3
Interrupt priority (IP) 5-5, 7-5
Interrupt priority (IP) mask 6-3
Interrupt request signals 4-46
Interrupt vector number 6-3
Interrupts
IP 5-5, 7-5
IP mask 6-3
IPIPE 5-22
IPL 4-54
IRQ 4-46
Limp status bit (SLIMP) 4-16
Long idle-line detection 6-29
Loop mode 5-23
LOOPS 6-30
Low-power operation 4-15
Low-power stop (LPSTOP) 4-31, 5-13
Low-power stop operation 6-2
LPSTOP 4-8, 4-15, 4-31, 5-13, 6-2
M bit 6-26
Mark 6-28
Master mode, QSPI 6-10, 6-17
Master wraparound 6-20
Memory maps 3-9
MISO 6-17, 6-20
MM 4-3
Mnemonics 2-3, 2-4
MODCLK 4-7, 4-10, 4-16, 4-41
MODE 4-54
Module mapping bit (MM) 4-3
Modulus counter (PITCLK) 4-7
MOSI 6-17, 6-20
loop mode 5-23
ABCD 5-4
BCD 5-4
low-power stop 5-13
MOVEC 5-6
NBCD 5-4
SBCD 5-4
special 5-9
TBL 5-13
MOVES 5-6
QSM 6-3
SCI 6-30
–M–
–L–
USER’S MANUAL
MC68332