MC68332ACAG16 Freescale Semiconductor, MC68332ACAG16 Datasheet - Page 80

• Manufacturer Part Number: MC68332ACAG16
• Description: IC MCU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, UART
• Minimum Operating Temperature: - 40 C
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4-40
Data bus mode select current is specified in APPENDIX A ELECTRICAL CHARAC-
TERISTICS. Do not confuse pin function with pin electrical state. Refer to 4.6.5 Pin
State During Reset for more information.
DATA0 determines the function of the boot ROM chip-select signal (CSBOOT). Unlike
other chip-select signals, CSBOOT is active at the release of reset. During reset ex-
ception processing, the MCU fetches initialization vectors beginning at address
$000000 in supervisor program space. An external memory device containing vectors
located at these addresses can be enabled by CSBOOT after a reset. The logic level
of DATA0 during reset selects boot ROM port size for dynamic bus allocation. When
DATA0 is held low, port size is eight bits; when DATA0 is held high, either by the weak
internal pull-up driver or by an external pull-up, port size is 16 bits. Refer to 4.8.4 Chip-
Select Reset Operation for more information.
DATA1 and DATA2 determine the functions of CS[2:0] and CS[5:3], respectively. DA-
TA[7:3] determine the functions of an associated chip select and all lower-numbered
chip-selects down through CS6. For example, if DATA5 is pulled low during reset,
CS[8:6] are assigned alternate function as ADDR[21:19], and CS[10:9] remain chip-
selects. Refer to 4.8.4 Chip-Select Reset Operation for more information.
DATA8 determines the function of the DSACK[1:0], AVEC, DS, AS, and SIZE pins. If
DATA8 is held low during reset, these pins are assigned to I/O port E.
DATA9 determines the function of interrupt request pins IRQ[7:0] and the clock mode
select pin (MODCLK). When DATA9 is held low during reset, these pins are assigned
to I/O port F.
DATA11 determines whether the SIM operates in test mode out of reset. This capabil-
ity is used for factory testing of the MCU.
MODE SELECT
*
Optional, to prevent conflict on RESET negation.
LINES
RESET
R/W
DS
Figure 4-15 Data Bus Mode Select Conditioning
• •
• •
• •
V
Freescale Semiconductor, Inc.
DATA15
DD
DATA1
DATA0
For More Information On This Product,
V
DD
SYSTEM INTEGRATION MODULE
Go to: www.freescale.com
*
• •
• •
• •
*
DATA BUS MODE DECODE
USER’S MANUAL
*
MC68332