MC68332ACAG16 Freescale Semiconductor, MC68332ACAG16 Datasheet - Page 65

• Manufacturer Part Number: MC68332ACAG16
• Description: IC MCU 32BIT 16MHZ 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACAG16

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 16 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Interface Type: SCI, SPI, UART
• Minimum Operating Temperature: - 40 C
• Controller Family/series: 68K
• No. Of I/o's: 15
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• Digital Ic Case Style: LQFP
• Rohs Compliant: Yes
• Data Ram Size: 2 KB
• Number Of Programmable I/os: 15
• Number Of Timers: 16
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 16MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 2KB
• # I/os (max): 15
• Number Of Timers - General Purpose: 16
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 144
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

4.5.2.2 Write Cycle
MC68332
USER’S MANUAL
During a write cycle, the MCU transfers data to an external memory or peripheral de-
vice. If the instruction specifies a long-word or word operation, the MCU attempts to
write two bytes at once. For a byte operation, the MCU writes one byte. The portion of
the data bus upon which each byte is written depends on operand size, peripheral ad-
dress, and peripheral port size.
Refer to 4.4.2 Dynamic Bus Sizing and 4.4.4 Misaligned Operands for more infor-
mation. Figure 4-10 is a flowchart of a write-cycle operation for a word transfer. Refer
to the SIM Reference Manual (SIMRM/AD) for more information.
2) DRIVE ADDRESS ON ADDR[23:0]
3) DRIVE FUNCTION CODE ON FC[2:0]
4) DRIVE SIZ[1:0] FOR OPERAND SIZE
1) SET R/W TO READ
NEGATE AS AND DS (S5)
START NEXT CYCLE (S0)
ASSERT AS AND DS (S1)
ADDRESS DEVICE (S0)
DECODE DSACK (S3)
LATCH DATA (S4)
MCU
Figure 4-9 Word Read Cycle Flowchart
Freescale Semiconductor, Inc.
For More Information On This Product,
SYSTEM INTEGRATION MODULE
Go to: www.freescale.com
1) DECODE ADDR, R/W, SIZ[1:0], DS
2) PLACE DATA ON DATA[15:0] OR
3) DRIVE DSACK SIGNALS
1) REMOVE DATA FROM DATA BUS
2) NEGATE DSACK
DATA[15:8] IF 8-BIT DATA
TERMINATE CYCLE (S5)
PRESENT DATA (S2)
PERIPHERAL
RD CYC FLOW
4-25