ST7FLITEU09M6TR STMicroelectronics, ST7FLITEU09M6TR Datasheet - Page 26

• Manufacturer Part Number: ST7FLITEU09M6TR
• Description: MCU 8BIT SGL VOLT FLASH SO-8
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEU09M6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: ST7FLITEUx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: ICC
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: No

Data EEPROM
5.6
Note:
5.7
5.7.1
Note:
26/139
Data EEPROM readout protection
The readout protection is enabled through an option bit (see option byte section).
When this option is selected, the programs and data stored in the EEPROM memory are
protected against readout (including a re-write protection). In Flash devices, when this
protection is removed by reprogramming the option byte, the entire Program memory and
EEPROM is first automatically erased.
Both program memory and data EEPROM are protected using the same option bit.
Figure 10. Data EEPROM programming cycle
Register description
EEPROM control/status register (EECSR)
Address:
Reset value: 0000 0000 (00h)
Bits 7:2 = Reserved, forced by hardware to 0
Bit 1 = E2LAT Latch access transfer bit:
Bit 0 = E2PGM Programming control and status bit
If the E2PGM bit is cleared during the programming cycle, the memory data is not
guaranteed.
Internal
programming
voltage
This bit is set by software. It is cleared by hardware at the end of the programming
cycle. It can only be cleared by software if the E2PGM bit is cleared
0: Read mode
1: Write mode
This bit is set by software to begin the programming cycle. At the end of the
programming cycle, this bit is cleared by hardware.
0: Programming finished or not yet started
1: Programming cycle is in progress
7
0
0030h
DATA LATCHES
WRITE OF
0
ERASE CYCLE
0
Read operation not possible
0
t
Read/write
PROG
WRITE CYCLE
0
0
Read operation possible
ST7LITEU05 ST7LITEU09
E2LAT
PGM
LAT
E2PGM
0