ST7FLITEU09M6TR STMicroelectronics, ST7FLITEU09M6TR Datasheet - Page 45

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ST7FLITEU09M6TR

Manufacturer Part Number
ST7FLITEU09M6TR
Description
MCU 8BIT SGL VOLT FLASH SO-8
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet

Specifications of ST7FLITEU09M6TR

Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
5
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
ST7FLITEUx
Core
ST7
Data Bus Width
8 bit
Data Ram Size
128 B
Interface Type
ICC
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
5
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ST7FLITEU09M6TR
Manufacturer:
MICROCHIP
Quantity:
12 000
ST7LITEU05 ST7LITEU09
8.3.1
Note:
Table 11.
8.3.2
ISx1
0
0
1
1
1
2
3
External interrupt control register 1 (EICR1)
Reset value: 0000 0000 (00h)
Bits 7:6 = Reserved, must be kept cleared.
Bits 5:4 = IS2[1:0] ei2 sensitivity bits
Bits 3:2 = IS1[1:0] ei1 sensitivity bits
Bits 1:0 = IS0[1:0] ei0 sensitivity bits
These 8 bits can be written only when the I bit in the CC register is set.
Changing the sensitivity of a particular external interrupt clears this pending interrupt. This
can be used to clear unwanted pending interrupts. Refer to “External interrupt function” on
page 61.
Whatever the sensitivity configuration, ei2 cannot exit the MCU from Halt, Active-Halt and
AWUFH modes when a falling edge occurs.
Interrupt sensitivity bits
External interrupt control register 2 (EICR2)
Reset Value: 0000 0000 (00h)
Bits 7:4 = Reserved
Bits 3:2 = IS4[1:0] ei4 sensitivity
These bits define the interrupt sensitivity for ei1 according to
Bits 1:0 = IS3[1:0] ei3 sensitivity
These bits define the interrupt sensitivity for ei0 according to
ISx0
0
1
0
1
These bits define the interrupt sensitivity for ei2 (Port C) according to
These bits define the interrupt sensitivity for ei1 (Port B) according to
These bits define the interrupt sensitivity for ei0 (Port A) according to
7
0
0
7
0
0
IS21
0
External interrupt sensitivity
Falling edge & low level
Rising and falling edge
Falling edge only
Rising edge only
IS20
0
Read/write
Read/write
IS11
IS41
IS10
IS40
Table
Table
11.
11.
IS01
IS31
Table
Table
Table
11.
11.
11.
Interrupts
IS00
IS30
0
0
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