ST7FLITEU09M6TR STMicroelectronics, ST7FLITEU09M6TR Datasheet - Page 73

• Manufacturer Part Number: ST7FLITEU09M6TR
• Description: MCU 8BIT SGL VOLT FLASH SO-8
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEU09M6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: ST7FLITEUx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: ICC
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: No

ST7LITEU05 ST7LITEU09
Table 28.
Address
(Hex.)
0C
0B
Bit 1 = WDGE Watchdog Enable
Bit 0 = WDGD Watchdog Reset Delay
Lite Timer Input Capture register (LTICR)
Reset value: 0000 0000 (00h)
Bits 7:0 = ICR[7:0] Input capture value
These bits are read by software and cleared by hardware after a reset. If the ICF bit in the
LTCSR is cleared, the value of the 8-bit up-counter will be captured when a rising or falling
edge occurs on the LTIC pin.
Lite timer register map and reset values
LTCSR
Reset value
LTICR
Reset value
Register label
ICR7
This bit is set and cleared by software.
0: Watchdog disabled
1: Watchdog enabled
This bit is set by software. It is cleared by hardware at the end of each t
0: Watchdog reset not delayed
1: Watchdog reset delayed
7
ICR6
ICR7
ICIE
7
0
0
ICR5
ICR6
ICF
6
0
0
ICR4
ICR5
TB
5
0
0
Read only
ICR4
TBIE
ICR3
4
0
0
ICR3
TBF
3
0
0
ICR2
WDGRF
ICR2
2
0
x
On-chip peripherals
ICR1
WDGE
ICR1
WDG
1
0
0
period.
ICR0
WDGD
ICR0
0
73/139
0
0
0