ST7FLITEU09M6TR STMicroelectronics, ST7FLITEU09M6TR Datasheet - Page 74

• Manufacturer Part Number: ST7FLITEU09M6TR
• Description: MCU 8BIT SGL VOLT FLASH SO-8
• Manufacturer: STMicroelectronics
• Series: ST7r

Specifications of ST7FLITEU09M6TR

• Core Processor: ST7
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 5
• Program Memory Size: 2KB (2K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Data Converters: A/D 5x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Processor Series: ST7FLITEUx
• Core: ST7
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: ICC
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST7FLITE-SK/RAIS, ST7FLITU0-D/RAIS, STX-RLINK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / Rohs Status: No

On-chip peripherals
11.2
11.2.1
11.2.2
11.2.3
Note:
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12-bit autoreload timer (AT)
Introduction
The 12-bit Autoreload Timer can be used for general-purpose timing functions. It is based
on a free-running 12-bit upcounter with a PWM output channel.
Main features
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●
●
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Figure 37. Block diagram
Functional description
PWM mode
This mode allows a pulse width modulated signals to be generated on the PWM0 output pin
with minimum core processing overhead. The PWM0 output signal can be enabled or
disabled using the OE0 bit in the PWMCR register. When this bit is set the PWM I/O pin is
configured as output push-pull alternate function.
CMPF0 is available in PWM mode (see PWM0CSR description
12-BIT DUTY CYCLE VALUE (shadow)
12-bit upcounter with 12-bit autoreload register (ATR)
Maskable overflow interrupt
PWM signal generator
Frequency range 2 kHz - 4 MHz (@ 8 MHz f
–
–
–
Output compare function
Preload
DCR0H
f
(1 ms timebase
@ 8 MHz)
LTIMER
f
CPU
Programmable duty-cycle
Polarity control
Maskable compare interrupt
Preload
DCR0L
on OVF Event
IF OE0=1
0
7
ATCSR
0
0
f
COUNTER
CK1
OE0 bit
1
0
CNTR
ATR
CK0
CMPF0 bit
COMP-
PARE
12-BIT AUTORELOAD VALUE
OVF
12-BIT UPCOUNTER
CPU
OVFIE
)
CMPIE
CMPF0
0
Update on OVF Event
OVF INTERRUPT
REQUEST
f
PWM
on page
ST7LITEU05 ST7LITEU09
OP0 bit
POL-
ARITY
OE0 bit
80).
CMP INTERRUPT
REQUEST
PWM0