ST10F269Z2Q6 STMicroelectronics, ST10F269Z2Q6 Datasheet - Page 119

• Manufacturer Part Number: ST10F269Z2Q6
• Description: MCU 16BIT 256K FLASH 144PQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F269Z2Q6

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-QFP
• Controller Family/series: ST10
• No. Of I/o's: 111
• Ram Memory Size: 12KB
• Cpu Speed: 40MHz
• No. Of Timers: 5
• Embedded Interface Type: CAN, SSC, USART
• Rohs Compliant: Yes
• Processor Series: ST10F26x
• Core: ST10
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SSC, USART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 111
• Number Of Timers: 2 x 16 bit
• Operating Supply Voltage: 0.3 V to 4 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit x 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 497-4833

ST10F269
Depending on the delay of the next applied reset,
the MCU can enter a synchronous reset or an
asynchronous reset. If RPD pin is below 2.5V an
asynchronous reset starts, if RPD pin is above
2.5V a synchronous reset starts. (See Section
18.1 - and Section 18.2 -).
Note that an internal pull-down is connected to
RPD pin and can drive a 100 A to 200 A current.
This Pull-down is turned on when RSTIN pin is
low.
To properly use the bidirectional reset features,
the schematic (or equivalent) of Figure 60 must be
implemented. R1-C1 only work for power-on or
manual reset in the same way as explained
previously. D1 diode brings a faster discharge of
Figure 58 : Internal (simplified) Reset Circuitry.
Internal
Reset
Signal
EINIT Instruction
Reset State
Machine
Clock
Clr
Trigger
Asynchronous
Reset
Reset Sequence
(512 CPU Clock Cycles)
Set
Clr
From/to Exit
Powerdown
Circuit
Q
SRST instruction
watchdog overflow
C1 capacitor at power-off during repetitive
switch-on / switch-off sequences. D2 diode
performs an OR-wired connection, it can be
replaced with an open drain buffer. R2 resistor
may be added to increase the pull-up current to
the open drain in order to get a faster rise time on
RSTIN pin when bidirectional function is activated.
The start-up configurations and some system
features are selected on reset sequences as
described in Table 38 and Table 39.
Table 38
configuration latched on PORT0 in the five
different reset ways. Table 39 summarizes the
state of bits of PORT0 latched in RP0H,
SYSCON, BUSCON0 registers.
BDRSTEN
describes
what
18 - SYSTEM RESET
V
V
DD
DD
Weak pull-down
(~200 A)
is
RSTOUT
the
RSTIN
RPD
system
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