MCF5282CVF80J Freescale Semiconductor, MCF5282CVF80J Datasheet - Page 342

• Manufacturer Part Number: MCF5282CVF80J
• Description: IC MPU 512K FLASH 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF528xr

Specifications of MCF5282CVF80J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 150
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF528x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5282-KIT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

Fast Ethernet Controller (FEC)
17.5.4
In the FEC, the descriptor control RISC initializes some registers after ECR[ETHER_EN] is asserted.
After the microcontroller initialization sequence is complete, hardware is ready for operation.
Table 17-34
17.5.5
After setting ECR[ETHER_EN], you can set up the buffer/frame descriptors and write to TDAR and
RDAR. Refer to
17.5.6
The FEC supports an MII interface for 10/100 Mbps Ethernet and a 7-wire serial interface for 10 Mbps
Ethernet. The RCR[MII_MODE] bit select the interface mode. In MII mode (RCR[MII_MODE] set),
there are 18 signals defined by the IEEE 802.3 standard and supported by the EMAC.
these signals.
17-32
Microcontroller Initialization
User Initialization (After Setting ECR[ETHER_EN])
Network Interface Options
shows microcontroller initialization operations.
Table 17-33. FEC User Initialization (Before ECR[ETHER_EN]) (continued)
Section 17.5.1, “Buffer Descriptors,”
MCF5282 and MCF5216 ColdFire Microcontroller User’s Manual, Rev. 3
Table 17-34. Microcontroller Initialization
Signal Description
Transmit Enable
Transmit Clock
Transmit Error
Initialize (Empty) Transmit Descriptor ring
Transmit Data
Initialize (Empty) Receive Descriptor ring
Initialize BackOff Random Number Seed
Initialize FIFO Count Registers
Initialize Transmit Ring Pointer
Initialize Receive Ring Pointer
Table 17-35. MII Mode
Clear Transmit FIFO
Clear Receive FIFO
Activate Transmitter
Activate Receiver
Description
Description
for more details.
FEC_TXD[3:0]
FEC_TXCLK
FEC_TXEN
FEC_TXER
EMAC pin
Freescale Semiconductor
Table 17-35
shows