HD6417750RF240DV Renesas Electronics America, HD6417750RF240DV Datasheet - Page 772

MPU 3V 16K I-TEMP,PB-FREE 208-QF

HD6417750RF240DV

Manufacturer Part Number
HD6417750RF240DV
Description
MPU 3V 16K I-TEMP,PB-FREE 208-QF
Manufacturer
Renesas Electronics America
Series
SuperH® SH7750r
Datasheet

Specifications of HD6417750RF240DV

Core Processor
SH-4
Core Size
32-Bit
Speed
240MHz
Connectivity
EBI/EMI, FIFO, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
28
Program Memory Type
ROMless
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
1.4 V ~ 1.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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Part Number:
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Section 15 Serial Communication Interface (SCI)
Table 15.9 SCSMR1 and SCSCR1 Settings for SCI Clock Source Selection
SCSMR1
Bit 7:
C/A
0
1
15.3.2
In asynchronous mode, characters are sent or received, each preceded by a start bit indicating the
start of communication and followed by one or two stop bits indicating the end of communication.
Serial communication is thus carried out with synchronization established on a character-by-
character basis.
Inside the SCI, the transmitter and receiver are independent units, enabling full-duplex
communication. Both the transmitter and the receiver also have a double-buffered structure, so
that data can be read or written during transmission or reception, enabling continuous data
transfer.
Figure 15.5 shows the general format for asynchronous serial communication.
In asynchronous serial communication, the transmission line is usually held in the mark state (high
level). The SCI monitors the transmission line, and when it goes to the space state (low level),
recognizes a start bit and starts serial communication.
One serial communication character consists of a start bit (low level), followed by data (in LSB-
first order), a parity bit (high or low level), and finally one or two stop bits (high level).
Rev.7.00 Oct. 10, 2008 Page 686 of 1074
REJ09B0366-0700
Operation in Asynchronous Mode
Bit 1:
CKE1
0
1
0
1
SCSCR1 Setting
Bit 0:
CKE0
0
1
0
1
0
1
0
1
Mode
Asynchronous
mode
Synchronous
mode
Clock
Source
External
Internal
External
Internal
SCI Transmit/Receive Clock
SCK Pin Function
SCI does not use SCK pin
Outputs clock with same
frequency as bit rate
Inputs clock with frequency of
16 times the bit rate
Outputs serial clock
Inputs serial clock

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