ATMEGA169-16AI SL710 Atmel, ATMEGA169-16AI SL710 Datasheet - Page 223

• Manufacturer Part Number: ATMEGA169-16AI SL710
• Description: IC AVR MCU 16K 16MHZ IND 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169-16AI SL710

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA16916ASL710

LCD Contrast Control
Register – LCDCCR
2514P–AVR–07/06
This is a very flexible scheme, and users are encouraged to calculate their own table to
investigate the possible frame rates from the formula above. Note when using 1/3 duty
the frame rate is increased with 33% when Frame Rate Register is constant. Example of
frame rate calculation is shown in Table 98.
Table 98. Example of frame rate calculation
• Bits 7:5 – LCDDC2:0: LDC Display Configuration
The LCDDC2:0 bits determine the amount of time the LCD drivers are turned on for
each voltage transition on segment and common pins. A short drive time will lead to
lower power consumption, but displays with high internal resistance may need longer
drive time to achieve satisfactory contrast. Note that the drive time will never be longer
than one half prescaled LCD clock period, even if the selected drive time is longer.
When using static bias or blanking, drive time will always be one half prescaled LCD
clock period.
Note:
Table 99. LCD Display Configuration
• Bit 4 – Res: Reserved Bit
This bit is reserved in the ATmega169 and will always read as zero.
• Bits 3:0 – LCDCC3:0: LCD Contrast Control
Bit
Read/Write
Initial Value
clk
4 MHz
4 MHz
32.768 kHz
32.768 kHz
LCD
LCDDC2
These bits are not available in ATmega169 revisions A to D
0
0
0
0
1
1
1
1
LCDDC2
R/W
7
0
duty
1/4
1/3
Static
1/2
LCDDC1
R/W
6
0
K
LCDDC1
8
6
8
8
0
0
1
1
0
0
1
1
LCDDC0
2048
2048
R/W
16
16
5
0
N
LCDCD2:0
R
4
–
0
011
011
000
100
LCDDC0
LCDCC3
R/W
0
1
0
1
0
1
0
1
3
0
D
4
4
1
5
LCDCC2
R/W
2
0
Frame Rate
4000000/(8*2048*4) = 61 Hz
4000000/(6*2048*4) = 81 Hz
32768/(8*16*1) = 256 Hz
32768/(8*16*5) = 51 Hz
ATmega169/V
Nominal drive time
300 µs
70 µs
150 µs
450 µs
575 µs
850 µs
1150 µs
50% of clk
LCDCC1
R/W
1
0
LCDCC0
LCD_PS
R/W
0
0
LCDCCR
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