ATMEGA169-16AI SL710 Atmel, ATMEGA169-16AI SL710 Datasheet - Page 71

IC AVR MCU 16K 16MHZ IND 64TQFP

ATMEGA169-16AI SL710

Manufacturer Part Number
ATMEGA169-16AI SL710
Description
IC AVR MCU 16K 16MHZ IND 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA169-16AI SL710

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA16916ASL710
2514P–AVR–07/06
• XCK/AIN0/PCINT2 – Port E, Bit 2
XCK, USART External Clock. The Data Direction Register (DDE2) controls whether the
clock is output (DDE2 set) or input (DDE2 cleared). The XCK pin is active only when the
USART operates in synchronous mode.
AIN0 – Analog Comparator Positive input. This pin is directly connected to the positive
input of the Analog Comparator.
PCINT2, Pin Change Interrupt Source 2: The PE2 pin can serve as an external interrupt
source.
• TXD/PCINT1 – Port E, Bit 1
TXD0, UART0 Transmit pin.
PCINT1, Pin Change Interrupt Source 1: The PE1 pin can serve as an external interrupt
source.
• RXD/PCINT0 – Port E, Bit 0
RXD, USART Receive pin. Receive Data (Data input pin for the USART). When the
USART Receiver is enabled this pin is configured as an input regardless of the value of
DDE0. When the USART forces this pin to be an input, a logical one in PORTE0 will turn
on the internal pull-up.
PCINT0, Pin Change Interrupt Source 0: The PE0 pin can serve as an external interrupt
source.
Table 40 and Table 41 relates the alternate functions of Port E to the overriding signals
shown in Figure 26 on page 60.
Table 40. Overriding Signals for Alternate Functions PE7..PE4
Note:
Signal
Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
1. CKOUT is one if the CKOUT Fuse is programmed
PE7/PCINT7
0
0
CKOUT
1
CKOUT
clk
PCINT7 •
PCIE0
1
PCINT7
INPUT
I/O
(1)
(1)
PE6/DO/
PCINT6
0
0
0
0
USI_THREE-
WIRE
DO
PCINT6 •
PCIE0
1
PCINT6
INPUT
PE5/DI/SDA/
PCINT5
USI_TWO-WIRE
0
USI_TWO-WIRE
(SDA + PORTE5) •
DDE5
USI_TWO-WIRE •
DDE5
0
(PCINT5 • PCIE0)
+ USISIE
1
DI/SDA INPUT
PCINT5 INPUT
ATmega169/V
PE4/USCK/SCL/
PCINT4
0
0
USI_TWO-WIRE
(USI_SCL_HOLD +
PORTE4) + DDE4
USI_TWO-WIRE •
DDE4
0
USITC
(PCINT4 • PCIE0) +
USISIE
1
USCKL/SCL INPUT
PCINT4 INPUT
71

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