ATMEGA169-16AI SL710 Atmel, ATMEGA169-16AI SL710 Datasheet - Page 54

• Manufacturer Part Number: ATMEGA169-16AI SL710
• Description: IC AVR MCU 16K 16MHZ IND 64TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA169-16AI SL710

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: ATMEGA16916ASL710

Pin Change Mask Register 1 –
PCMSK1
Pin Change Mask Register 0 –
PCMSK0
54
ATmega169/V
• Bit 0 – INTF0: External Interrupt Flag 0
When an edge or logic change on the INT0 pin triggers an interrupt request, INTF0
becomes set (one). If the I-bit in SREG and the INT0 bit in EIMSK are set (one), the
MCU will jump to the corresponding Interrupt Vector. The flag is cleared when the inter-
rupt routine is executed. Alternatively, the flag can be cleared by writing a logical one to
it. This flag is always cleared when INT0 is configured as a level interrupt.
• Bit 7..0 – PCINT15..8: Pin Change Enable Mask 15..8
Each PCINT15..8-bit selects whether pin change interrupt is enabled on the correspond-
ing I/O pin. If PCINT15..8 is set and the PCIE1 bit in EIMSK is set, pin change interrupt
is enabled on the corresponding I/O pin. If PCINT15..8 is cleared, pin change interrupt
on the corresponding I/O pin is disabled.
• Bit 7..0 – PCINT7..0: Pin Change Enable Mask 7..0
Each PCINT7..0 bit selects whether pin change interrupt is enabled on the correspond-
ing I/O pin. If PCINT7..0 is set and the PCIE0 bit in EIMSK is set, pin change interrupt is
enabled on the corresponding I/O pin. If PCINT7..0 is cleared, pin change interrupt on
the corresponding I/O pin is disabled.
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
PCINT15
7
PCINT7
R/W
0
R/W
7
0
PCINT6
6
R/W
0
PCINT14
R/W
6
0
5
PCINT5
R/W
0
PCINT13
R/W
5
0
4
PCINT4
R/W
0
PCINT12
R/W
4
0
3
PCINT3
R/W
0
PCINT11
R/W
3
0
2
PCINT2
R/W
0
PCINT10
R/W
2
0
PCINT1
1
R/W
0
PCINT9
R/W
1
0
0
PCINT0
R/W
0
PCINT8
2514P–AVR–07/06
R/W
0
0
PCMSK0
PCMSK1