XRT75R12DIB-F Exar Corporation, XRT75R12DIB-F Datasheet - Page 41

• Manufacturer Part Number: XRT75R12DIB-F
• Description: Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
• Manufacturer: Exar Corporation

Specifications of XRT75R12DIB-F

• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V to 5 V
• Package / Case: TBGA-420
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REV. 1.0.3
The Transmit Clock applied via TxClk_n pins, for the selected data rate (for E3 = 34.368 MHz, DS3 = 44.736
MHz or STS-1 = 51.84 MHz), is duty cycle corrected by the internal PLL circuit to provide a 50% duty cycle
clock to the pulse shaping circuit. This allows a 30% to 70% duty cycle Transmit Clock to be supplied.
When the Single-Rail (NRZ) data format is selected, the Encoder Block encodes the data into either B3ZS
format (for either DS3 or STS-1) or HDB3 format (for E3).
An example of B3ZS encoding is shown in
consecutive zeros in the data stream, it is replaced with either B0V or 00V, where ‘B’ refers to Bipolar pulse
that is compliant with the Alternating polarity requirement of the AMI (Alternate Mark Inversion) line code and
‘V’ refers to a Bipolar Violation (e.g., a bipolar pulse that violates the AMI line code). The substitution of B0V or
00V is made so that an odd number of bipolar pulses exist between any two consecutive violation (V) pulses.
This avoids the introduction of a DC component into the line signal.
An example of the HDB3 encoding is shown in
consecutive zeros in the data stream, then the four zeros are substituted with either 000V or B00V pattern. The
substitution code is made in such a way that an odd number of pulses exist between any consecutive V pulses.
This avoids the introduction of DC component into the analog signal.
F
F
6.1
6.2
6.2.1
6.2.2
IGURE
IGURE
TNData
TPData
26. D
27. B3ZS E
Transmit Clock
B3ZS/HDB3 E
TxClk
Data
0
B3ZS Encoding
TPDATA
HDB3 Encoding
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
Signal
UAL
TClk
Line
-R
AIL
NCODING
NCODER
D
1
1
ATA
0
0
F
F
ORMAT
ORMAT
1
1
1
1
1
(
ENCODER AND DECODER ARE DISABLED
0
0
0
0
Figure
Figure
V
0
37
0
0
28. If the HDB3 encoder detects an occurrence of four
27. If the encoder detects an occurrence of three
1
1
1
0
0
0
0
V
0
B
0
)
0
0
0
V
0
B
0
0
XRT75R12D
V
0