XRT75R12DIB-F Exar Corporation, XRT75R12DIB-F Datasheet - Page 54

• Manufacturer Part Number: XRT75R12DIB-F
• Description: Peripheral Drivers & Components (PCIs) 12 Channel 3.3V-5V temp -45 to 85C
• Manufacturer: Exar Corporation

Specifications of XRT75R12DIB-F

• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V to 5 V
• Package / Case: TBGA-420
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

XRT75R12D
TWELVE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH SONET DESYNCHRONIZER
7.3
A
DDRESS
(H
0x0A
0x0B
0x0C
0x0D
0x0E
0x1A
0x1B
0x1C
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0F
0x10
0x11
0x12
0x13
0x14
0x15
0x16
0x17
0x18
0x19
Register Map
EX
)
T
ABLE
C
OMMAND
17: C
(D
CR10
CR12
CR17
CR18
CR19
CR20
CR21
CR22
CR23
CR26
CR27
CR28
CR11
ECIMAL
CR0
CR1
CR2
CR3
CR4
CR5
CR6
CR7
CR8
OMMAND
R
EGISTER
)
C
C
R
HANNEL
HANNEL
EGISTER
L
APSR
APST
IER0
ISR0
IER1
ISR1
RC0
CC0
EM0
RC1
CC1
EM1
AS0
TC0
EH0
AS1
TC0
EH1
JA0
EL0
JA1
EL1
ABEL
0 C
1 C
A
ONTROL
ONTROL
DDRESS
50
RUR
RUR
T
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/O
R/O
YPE
R
R
M
EGISTERS
EGISTERS
AP
APS Transmit Redundancy Control Register 0-5
Source Level Interrupt Enable Register - Ch 0
Source Level Interrupt Status Register Ch 0
Alarm Status Register - Ch 0
Transmit Control Register - Ch 0
Receive Control Register - Ch 0
Channel Control Register - Ch 0
Jitter Attenuator Control Register - Ch 0
APS Receive Redundancy Control Register 0-5
Error counter MS Byte Ch 0
Error counter LS Byte
Error counter Holding register
Source Level Interrupt Enable Register - Ch 1
Source Level Interrupt Status Register - Ch 1
Alarm Status Register - Ch 1
Transmit Control Register - Ch 1
Receive Control Register - Ch 1
Channel Control Register - Ch 1
Jitter Attenuator Control Register - Ch 1
Error counter MSByte Ch 1
Error counter LSbyte
Error counter Holding register
,
WITHIN THE
XRT75R12D
R
EGISTER
N
AME
REV. 1.0.3